SYSIO_B4_1_15K_DQS41 Tile Documentation

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Routing Muxes

Mux driving W1:JECLKOUT_I218

Source F20B0 F20B1
W1:JECLKIN0_I218 - -
W1:JECLKIN1_I218 - 1
W1:JECLKIN2_I218 1 -
W1:JECLKIN3_I218 1 1

Configuration Words

Configuration word IOLOGICB.DELAY.DEL_VALUE

initial fine delay value

IOLOGICB.DELAY.DEL_VALUE[0]F44B0
IOLOGICB.DELAY.DEL_VALUE[1]F45B0
IOLOGICB.DELAY.DEL_VALUE[2]F46B0
IOLOGICB.DELAY.DEL_VALUE[3]F47B0
IOLOGICB.DELAY.DEL_VALUE[4]F48B0
IOLOGICB.DELAY.DEL_VALUE[5]F49B0
IOLOGICB.DELAY.DEL_VALUE[6]F50B0

Configuration Enums

Configuration enum IOLOGICB.CEINMUX

Value F6B0 F7B0
1 - 1
CEIN 1 -
INV - -

Configuration enum IOLOGICB.CEOUTMUX

Value F5B0 F8B0
1 - 1
CEOUT 1 -
INV - -

Configuration enum IOLOGICB.DELAY.COARSE_DELAY

Value F53B0 F54B0
0NS - -
0P8NS 1 -
1P6NS - 1

Configuration enum IOLOGICB.DELAY.EDGE_MONITOR

Value F17B0
DISABLED -
ENABLED 1

Configuration enum IOLOGICB.DELAY.WAIT_FOR_EDGE

Value F43B0
DISABLED -
ENABLED 1

Configuration enum IOLOGICB.DELAYMUX

Value F36B0
IN -
OUT_REG 1

Configuration enum IOLOGICB.DIRMUX

Value F55B0
0 -
DIR 1

Configuration enum IOLOGICB.GSR

Value F34B0
DISABLED 1
ENABLED -

Configuration enum IOLOGICB.IDDRX1_ODDRX1.OUTPUT

Value F21B0
DISABLED -
ENABLED 1

Configuration enum IOLOGICB.IDDRXN.DDRMODE

Value F67B0 F68B0 F69B0
IDDR71 - 1 1
IDDRX2 - 1 -
IDDRX4 1 - -
IDDRX5 1 - 1
NONE - - -

Configuration enum IOLOGICB.INMUX

Value F31B0
BYPASS -
DELAY 1

Configuration enum IOLOGICB.INREG.REGSET

Value F15B0
RESET -
SET 1

Configuration enum IOLOGICB.IREG_OREG.OUTPUT

Value F21B1
DISABLED -
ENABLED 1

Configuration enum IOLOGICB.LOAD_NMUX

Value F51B0
1 -
LOAD_N 1

Configuration enum IOLOGICB.LSRINMUX

Value F9B0 F10B0
0 - -
INV - 1
LSRIN 1 1

Configuration enum IOLOGICB.LSROUTMUX

Value F11B0 F12B0
0 - -
INV 1 -
LSROUT 1 1

Configuration enum IOLOGICB.MIDDRXN.DDRMODE

Value F66B0 F67B0 F68B0
MIDDRX2 1 - 1
MIDDRX4 1 1 -
NONE - - -

Configuration enum IOLOGICB.MODDRXN.DDRMODE

Value F21B0 F21B1 F22B0 F23B0 F24B0 F39B0 F42B0 F64B0
MODDRX2_DQSW 1 1 - - - 1 1 -
MODDRX2_DQSW270 1 1 - - - - 1 1
MODDRX4_DQSW 1 1 - 1 - 1 1 -
MODDRX4_DQSW270 1 1 - 1 - - 1 1
MOSHX2 1 1 1 - - - - 1
MOSHX4 1 1 1 - 1 - - 1
NONE - - - - - - - -

Configuration enum IOLOGICB.MODE

Value F13B0 F69B0
IDDRX1_ODDRX1 - 1
IDDRXN - -
IREG_OREG - -
MIDDRXN_MODDRXN 1 -
NONE - -
ODDRXN - -

Configuration enum IOLOGICB.MOVEMUX

Value F62B0
0 -
MOVE 1

Configuration enum IOLOGICB.MTDDRXN.DDRMODE

Value F19B0
MTSHX2 1
MTSHX4 1
NONE -

Configuration enum IOLOGICB.ODDRXN.DDRMODE

Value F21B0 F21B1 F23B0 F24B0 F64B0
NONE - - - - -
ODDR71 1 1 - 1 1
ODDRX2 1 1 - - 1
ODDRX4 1 1 1 - 1
ODDRX5 1 1 1 1 1

Configuration enum IOLOGICB.OUTMUX

Value F32B0
BYPASS -
DELAY 1

Configuration enum IOLOGICB.OUTREG.REGSET

Value F65B0
RESET -
SET 1

Configuration enum IOLOGICB.RANK0UPDATEMUX

Value F56B0
OFF -
RANK0UPDATE 1

Configuration enum IOLOGICB.RANK1UPDATEMUX

Value F59B0
OFF -
RANK1UPDATE 1

Configuration enum IOLOGICB.RANKENABLEMUX

Value F57B0
OFF -
RANKENABLE 1

Configuration enum IOLOGICB.RANKSELECTMUX

Value F58B0
OFF -
RANKSELECT 1

Configuration enum IOLOGICB.SCLKINMUX

Value F26B0 F27B0
0 - -
INV 1 1
SCLKIN 1 -

Configuration enum IOLOGICB.SCLKOUTMUX

Value F37B0 F38B0
0 - -
INV 1 1
SCLKOUT 1 -

Configuration enum IOLOGICB.SRMODE

Value F33B0
ASYNC -
LSR_OVER_CE 1

Configuration enum IOLOGICB.TSREG.REGSET

Value F40B0
RESET -
SET 1

Configuration enum PIOA.DIFFIO18.BASE_TYPE

Value F0B1 F16B0 F25B0 F86B0 F87B0 F89B0 F91B0 F92B0 F93B0 F102B0 F103B0 F104B0 F105B0
BIDIR_HSTL15D_I - - 1 1 - 1 - 1 - - - 1 1
BIDIR_HSUL12D - - 1 1 - 1 - 1 - - - 1 1
BIDIR_LVDS - - - 1 - 0 - - - - - - -
BIDIR_MIPI_DPHY 1 1 - 1 - 0 - - - - - - -
BIDIR_SLVS 1 - - 1 - 0 - - - - - - -
BIDIR_SSTL135D_I - - 1 1 - 1 1 - - - - 1 1
BIDIR_SSTL135D_II - - 1 1 - 0 - - - - - 1 1
BIDIR_SSTL15D_I - - 1 1 - 1 1 - - - - 1 1
BIDIR_SSTL15D_II - - 1 1 - 0 - - - - - 1 1
INPUT_HSTL15D_I - - - 1 - 0 - - - - - - -
INPUT_HSUL12D - - - 1 - 0 - - - - - - -
INPUT_LVDS - - - 1 - 0 - - - - - - -
INPUT_MIPI_DPHY 1 1 - 1 1 0 - - - - - - -
INPUT_SLVS 1 - - 1 - 0 - - - - - - -
INPUT_SSTL135D_I - - - 1 - 0 - - - - - - -
INPUT_SSTL135D_II - - - 1 - 0 - - - - - - -
INPUT_SSTL15D_I - - - 1 - 0 - - - - - - -
INPUT_SSTL15D_II - - - 1 - 0 - - - - - - -
INPUT_SUBLVDS - - - 1 - 0 - - - - - - -
NONE - - - - - - - - - - - - -
OUTPUT_HSTL15D_I - - 1 - - 1 - 1 - 1 1 1 1
OUTPUT_HSUL12D - - 1 - - 1 - 1 - 1 1 1 1
OUTPUT_LVDS - - - 1 - 0 - - - - - - -
OUTPUT_MIPI_DPHY - 1 - - - 0 - - - - - - -
OUTPUT_SLVS - - - 1 - 0 - - - - - - -
OUTPUT_SSTL135D_I - - 1 1 - 1 1 - - 1 1 1 1
OUTPUT_SSTL135D_II - - 1 1 - 0 - - - 1 1 1 1
OUTPUT_SSTL15D_I - - 1 1 - 1 1 - - 1 1 1 1
OUTPUT_SSTL15D_II - - 1 1 - 0 - - - 1 1 1 1
OUTPUT_SUBLVDSEH - - 1 - - 1 1 1 1 1 1 1 1

Configuration enum PIOA.DIFFIO18.DIFFDRIVE_MIPI_DPHY

Value F76B0 F87B0
2P0 1 1
NA - -

Configuration enum PIOA.DIFFIO18.PULLMODE

Value F83B0
FAILSAFE 0
NONE 1

Configuration enum PIOA.SEIO18.BASE_TYPE

Value F89B0
BIDIR_HSTL15_I 1
BIDIR_HSUL12 -
BIDIR_LVCMOS10H 1
BIDIR_LVCMOS12H 1
BIDIR_LVCMOS15H 1
BIDIR_LVCMOS18H 1
BIDIR_SSTL135_I 1
BIDIR_SSTL135_II 1
BIDIR_SSTL15_I 1
BIDIR_SSTL15_II 1
INPUT_HSTL15_I 1
INPUT_HSUL12 -
INPUT_LVCMOS10H 1
INPUT_LVCMOS10R 1
INPUT_LVCMOS12H 1
INPUT_LVCMOS15H 1
INPUT_LVCMOS18H 1
INPUT_SSTL135_I 1
INPUT_SSTL135_II 1
INPUT_SSTL15_I 1
INPUT_SSTL15_II 1
NONE 1
OUTPUT_HSTL15_I 1
OUTPUT_HSUL12 -
OUTPUT_LVCMOS10H 1
OUTPUT_LVCMOS12H 1
OUTPUT_LVCMOS15H 1
OUTPUT_LVCMOS18H 1
OUTPUT_SSTL135_I 1
OUTPUT_SSTL135_II 1
OUTPUT_SSTL15_I 1
OUTPUT_SSTL15_II 1

Configuration enum PIOB.SEIO18.BASE_TYPE

Value F12B1 F83B0 F85B0 F86B0 F89B0 F91B0 F92B0 F102B0 F103B0 F104B0 F105B0
BIDIR_HSTL15_I - - - - 1 - 1 - - 1 1
BIDIR_HSUL12 - - - - 1 - 1 - - 1 1
BIDIR_LVCMOS10H 1 - 1 1 1 - 1 - - 1 1
BIDIR_LVCMOS12H - - 1 1 1 - 1 - - 1 1
BIDIR_LVCMOS15H - - - - 1 - 1 - - 1 1
BIDIR_LVCMOS18H - - - - 1 - 1 - - 1 1
BIDIR_SSTL135_I - - - - 1 1 - - - 1 1
BIDIR_SSTL135_II - - - - - - - - - 1 1
BIDIR_SSTL15_I - - - - 1 1 - - - 1 1
BIDIR_SSTL15_II - - - - - - - - - 1 1
INPUT_HSTL15_I - - - - - - - - 1 - -
INPUT_HSUL12 - - - - - - - - 1 - -
INPUT_LVCMOS10H 1 - 1 1 - - - - 1 - -
INPUT_LVCMOS10R - - - - - - - - 1 - -
INPUT_LVCMOS12H - - 1 1 - - - - 1 - -
INPUT_LVCMOS15H - - - - - - - - 1 - -
INPUT_LVCMOS18H - - - - - - - - 1 - -
INPUT_SSTL135_I - - - - - - - - 1 - -
INPUT_SSTL135_II - - - - - - - - 1 - -
INPUT_SSTL15_I - - - - - - - - 1 - -
INPUT_SSTL15_II - - - - - - - - 1 - -
NONE - - - - 1 - - - - - -
OUTPUT_HSTL15_I - 1 - 1 1 - 1 1 1 1 1
OUTPUT_HSUL12 - 1 - 1 1 - 1 1 1 1 1
OUTPUT_LVCMOS10H - 1 - 1 1 - 1 1 1 1 1
OUTPUT_LVCMOS12H - 1 - 1 1 - 1 1 1 1 1
OUTPUT_LVCMOS15H - 1 - 1 1 - 1 1 1 1 1
OUTPUT_LVCMOS18H - 1 - 1 1 - 1 1 1 1 1
OUTPUT_SSTL135_I - 1 - 1 1 1 - 1 1 1 1
OUTPUT_SSTL135_II - 1 - 1 - - - 1 1 1 1
OUTPUT_SSTL15_I - 1 - 1 1 1 - 1 1 1 1
OUTPUT_SSTL15_II - 1 - 1 - - - 1 1 1 1

Configuration enum PIOB.SEIO18.DFTDO2DI

Value F79B0
DISABLED -
ENABLED 1

Configuration enum PIOB.SEIO18.DRIVE_1V0

Value F90B0 F91B0 F92B0 F93B0
2 0 1 0 1
4 1 0 1 0

Configuration enum PIOB.SEIO18.DRIVE_1V2

Value F89B0 F90B0 F91B0 F92B0 F93B0
2 0 0 1 0 1
4 0 1 0 1 0
8 1 0 0 1 0

Configuration enum PIOB.SEIO18.DRIVE_1V5

Value F89B0 F90B0 F91B0 F92B0 F93B0
2 0 0 1 0 1
4 0 1 0 1 0
8 1 0 0 1 0

Configuration enum PIOB.SEIO18.DRIVE_1V8

Value F89B0 F90B0 F91B0 F92B0 F93B0
12 1 0 1 1 1
2 0 0 1 0 1
4 0 1 0 1 0
50RS 1 0 0 1 0
8 1 0 0 1 0

Configuration enum PIOB.SEIO18.DRIVE_HSUL12

Value F89B0 F90B0 F91B0 F93B0
4 0 1 0 0
6 0 1 1 1
8 1 0 0 0

Configuration enum PIOB.SEIO18.ENADC_IN

Value F77B0
DISABLED -
ENABLED 1

Configuration enum PIOB.SEIO18.LOOPBKCD2AB

Value F75B0
DISABLED -
ENABLED 1

Configuration enum PIOB.SEIO18.OPENDRAIN

Value F88B0
OFF -
ON 1

Configuration enum PIOB.SEIO18.PULLMODE

Value F83B0 F84B0
DOWN 0 0
KEEPER 0 1
NONE 1 0
UP 1 1

Configuration enum PIOB.SEIO18.SLEEPHIGHLEAKAGE

Value F1B1
DISABLED -
ENABLED 1

Configuration enum PIOB.SEIO18.SLEWRATE

Value F5B1 F6B1 F7B1
FAST 1 1 1
MED 0 0 1
SLOW 0 0 0

Configuration enum PIOB.SEIO18.TERMINATION_1V2

Value F94B0 F98B0 F99B0 F100B0
40 1 - - -
50 - 1 1 -
60 - 1 - -
75 - - 1 1
OFF - - - -

Configuration enum PIOB.SEIO18.TERMINATION_1V35

Value F94B0 F98B0 F99B0 F100B0 F101B0
40 1 - - 1 -
50 - 1 1 - 1
60 - 1 - - -
75 - - 1 1 -
OFF - - - - -

Configuration enum PIOB.SEIO18.TERMINATION_1V5

Value F94B0 F98B0 F99B0 F100B0 F101B0
40 1 - - 1 -
50 - 1 1 - 1
60 - 1 - - -
75 - - 1 1 -
OFF - - - - -

Configuration enum PIOB.SEIO18.TERMINATION_1V8

Value F94B0 F98B0 F99B0 F100B0 F101B0
150 - - 1 - -
40 1 - 1 - -
50 - 1 1 1 -
60 - 1 - 1 -
75 - - 1 1 1
OFF - - - - -

Configuration enum PIOB.SEIO18.VREF

Value F80B0 F81B0 F82B0 F86B0
OFF - - - -
VREF1_LOAD - 1 1 1
VREF2_LOAD 1 - 1 1

Configuration enum PIOB.TMUX

Value F102B0
INV 1
T -