SYSIO_B2_0_REM Tile Documentation

Config Bitmap

 
 
 
1
1
1
1
1
1
1
O
T
3
3
T
D

Configuration Enums

Configuration enum PIOA.BASE_TYPE

Value F3B0 F11B0 F12B0 F14B0
BIDIR_LVCMOS12 1 - - 1
BIDIR_LVCMOS15 1 - - -
BIDIR_LVCMOS18 1 - - -
BIDIR_LVCMOS25 - - 1 -
BIDIR_LVCMOS33 - - - -
INPUT_LVCMOS10 1 1 - 1
INPUT_LVCMOS12 1 - - 1
INPUT_LVCMOS15 1 - - -
INPUT_LVCMOS18 1 - - -
INPUT_LVCMOS25 - - 1 -
INPUT_LVCMOS33 - - - -
NONE - - - -
OUTPUT_LVCMOS12 1 - - -
OUTPUT_LVCMOS15 1 - - -
OUTPUT_LVCMOS18 1 - - -
OUTPUT_LVCMOS25 1 - - -
OUTPUT_LVCMOS25D 1 - - -
OUTPUT_LVCMOS33 1 - - -
OUTPUT_LVCMOS33D 1 - - -

Configuration enum PIOA.DFTDO2DI

Value F15B0
DISABLED -
ENABLED 1

Configuration enum PIOA.HYSTERESIS_1V5

Value F3B0
OFF 0
ON 1

Configuration enum PIOA.HYSTERESIS_1V8

Value F3B0
OFF 0
ON 1

Configuration enum PIOA.HYSTERESIS_2V5

Value F12B0
OFF 0
ON 1

Configuration enum PIOA.OPENDRAIN

Value F10B0
OFF -
ON 1

Configuration enum PIOA.TERMINATION_1V2

Value F6B0 F7B0 F8B0 F9B0
40 - - - 1
50 - 1 1 -
60 - - 1 -
75 1 1 - -
OFF - - - -

Configuration enum PIOA.TERMINATION_1V5

Value F5B0 F6B0 F7B0 F8B0 F9B0
40 - 1 - - 1
50 1 - 1 1 -
60 - - - 1 -
75 - 1 1 - -
OFF - - - - -

Configuration enum PIOA.TERMINATION_1V8

Value F5B0 F6B0 F7B0 F8B0 F9B0
150 - - 1 - -
40 - - 1 - 1
50 - 1 1 1 -
60 - 1 - 1 -
75 1 1 1 - -
OFF - - - - -

Configuration enum PIOA.UNDERDRIVE_3V3

Value F12B0 F13B0
OFF 0 0
ON 1 1

Configuration enum PIOB.BASE_TYPE

Value F4B0
BIDIR_LVCMOS12 1
BIDIR_LVCMOS15 1
BIDIR_LVCMOS18 1
BIDIR_LVCMOS25 -
BIDIR_LVCMOS33 -
INPUT_LVCMOS10 1
INPUT_LVCMOS12 1
INPUT_LVCMOS15 1
INPUT_LVCMOS18 1
INPUT_LVCMOS25 -
INPUT_LVCMOS33 -
NONE -
OUTPUT_LVCMOS12 1
OUTPUT_LVCMOS15 1
OUTPUT_LVCMOS18 1
OUTPUT_LVCMOS25 1
OUTPUT_LVCMOS25D 1
OUTPUT_LVCMOS33 1
OUTPUT_LVCMOS33D 1

Configuration enum PIOB.HYSTERESIS_1V5

Value F4B0
OFF 0
ON 1

Configuration enum PIOB.HYSTERESIS_1V8

Value F4B0
OFF 0
ON 1