SYSIO_B1_DED_15K Tile Documentation

Tile Bels

NameType
PIOB SEIO33_CORE

Config Bitmap

 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
1
1
 
 
 
 
 
 
 
 
 
 
 
 
 
 
P
1
3
3
3
3
3
D
T
3
3
T
O
1
1
1
 
S
T
T
T
T
C
L
S
S
S
S
G
P
P
1
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
1
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 

Configuration Enums

Configuration enum PIOB.BASE_TYPE

Value F1B4 F2B5 F3B4 F3B5 F4B5 F5B5 F6B4 F8B4 F9B8 F10B4 F11B4 F13B5 F15B5
BIDIR_LVCMOS12 - 1 1 1 - - 1 1 1 - - - -
BIDIR_LVCMOS15 1 1 1 1 - - 1 - 1 - - - 1
BIDIR_LVCMOS18 1 1 1 1 - - 1 - 1 - - - -
BIDIR_LVCMOS25 - 1 1 1 - - 1 - - 1 - - -
BIDIR_LVCMOS33 - 1 1 1 - - 1 - - - - - -
INPUT_LVCMOS10 - 1 1 1 - - 1 1 1 - 1 - -
INPUT_LVCMOS12 - - - - 1 - - 1 1 - - - -
INPUT_LVCMOS15 1 - - - 1 - - - 1 - - - 1
INPUT_LVCMOS18 1 - - - 1 - - - 1 - - - -
INPUT_LVCMOS25 - - - - 1 - - - - 1 - - -
INPUT_LVCMOS33 - - - - 1 - - - - - - - -
NONE - - - - - - 1 - - - - - -
OUTPUT_LVCMOS12 - 1 1 1 1 1 1 - 1 - - 1 -
OUTPUT_LVCMOS15 - 1 1 1 1 1 1 - 1 - - 1 -
OUTPUT_LVCMOS18 - 1 1 1 1 1 1 - 1 - - 1 -
OUTPUT_LVCMOS25 - 1 1 1 1 1 1 - 1 - - 1 -
OUTPUT_LVCMOS25D - 1 1 1 1 1 1 - 1 - - 1 -
OUTPUT_LVCMOS33 - 1 1 1 1 1 1 - 1 - - 1 -
OUTPUT_LVCMOS33D - 1 1 1 1 1 1 - 1 - - 1 -

Configuration enum PIOB.CLAMP

Value F6B5
OFF 0
ON 1

Configuration enum PIOB.DFTDO2DI

Value F7B4
DISABLED -
ENABLED 1

Configuration enum PIOB.DRIVE_1V2

Value F2B4 F3B4 F4B4 F5B4 F6B4
12 1 1 1 0 1
2 1 0 1 0 0
4 0 1 0 1 0
8 0 1 0 0 1

Configuration enum PIOB.DRIVE_1V5

Value F2B4 F3B4 F4B4 F5B4 F6B4
12 1 1 1 0 1
2 1 0 1 0 0
4 0 1 0 1 0
8 0 1 0 0 1

Configuration enum PIOB.DRIVE_1V8

Value F2B4 F3B4 F4B4 F5B4 F6B4
2 1 0 1 0 0
4 0 1 0 1 0
50RS 0 1 0 0 1
8 0 1 0 0 1

Configuration enum PIOB.DRIVE_2V5

Value F2B4 F3B4 F4B4 F5B4 F6B4
10 0 0 0 1 1
2 1 0 1 0 0
4 0 1 0 1 0
50RS 0 1 0 0 1
8 0 1 0 0 1

Configuration enum PIOB.DRIVE_3V3

Value F2B4 F3B4 F4B4 F5B4 F6B4
12 1 1 1 0 1
2 1 0 1 0 0
4 0 1 0 1 0
50RS 1 0 0 0 0
8 0 1 0 0 1

Configuration enum PIOB.GLITCHFILTER

Value F12B5
OFF 1
ON -

Configuration enum PIOB.HYSTERESIS_1V5

Value F1B4 F9B8 F15B5
OFF 0 0 0
ON 1 1 1

Configuration enum PIOB.HYSTERESIS_1V8

Value F1B4 F9B8
OFF 0 0
ON 1 1

Configuration enum PIOB.HYSTERESIS_2V5

Value F10B4
OFF 0
ON 1

Configuration enum PIOB.LOOPBKCD2AB

Value F7B5
DISABLED -
ENABLED 1

Configuration enum PIOB.OPENDRAIN

Value F12B4
OFF -
ON 1

Configuration enum PIOB.PULLMODE

Value F0B4 F13B5 F14B5
DOWN 0 0 0
I3C 1 1 1
KEEPER 0 0 1
NONE 0 1 0
UP 0 1 1

Configuration enum PIOB.SLEEPHIGHLEAKAGE

Value F1B5
DISABLED -
ENABLED 1

Configuration enum PIOB.SLEWRATE

Value F8B5 F9B5 F10B5 F11B5
FAST 1 1 1 1
MED - - - 1
SLOW - - - -

Configuration enum PIOB.TERMINATION_1V2

Value F0B3 F13B4 F14B4 F15B4
40 - 1 - -
50 - - 1 1
60 - - 1 -
75 1 - - 1
OFF - - - -

Configuration enum PIOB.TERMINATION_1V5

Value F0B3 F1B3 F13B4 F14B4 F15B4
40 1 - 1 - -
50 - 1 - 1 1
60 - - - 1 -
75 1 - - - 1
OFF - - - - -

Configuration enum PIOB.TERMINATION_1V8

Value F0B3 F1B3 F13B4 F14B4 F15B4
150 - - - - 1
40 - - 1 - 1
50 1 - - 1 1
60 1 - - 1 -
75 1 1 - - 1
OFF - - - - -

Configuration enum PIOB.TMUX

Value F5B5
INV 1
T -

Configuration enum PIOB.UNDERDRIVE_1V8

Value F9B4 F15B5
OFF 0 0
ON 1 1

Configuration enum PIOB.UNDERDRIVE_3V3

Value F9B4 F10B4
OFF 0 0
ON 1 1

Fixed Connections

SourceSink
W1:JCE0→ JCEIN_SIOLOGIC_CORE_IBASE_PIC_A
W1:JCE1→ JCEIN_SIOLOGIC_CORE_IBASE_PIC_B
W1:JCE0→ JCEOUT_SIOLOGIC_CORE_IBASE_PIC_A
W1:JCE1→ JCEOUT_SIOLOGIC_CORE_IBASE_PIC_B
JPADDI_SEIO33_CORE_IOB→ JDI_SIOLOGIC_CORE_IBASE_PIC_B
JTXDATA0_SIOLOGIC_CORE_IBASE_PIC_A→ JDOUT_SIOLOGIC_CORE_IBASE_PIC_A
JTXDATA0_SIOLOGIC_CORE_IBASE_PIC_B→ JDOUT_SIOLOGIC_CORE_IBASE_PIC_B
W1:JCIBMUXOUTB0→ JI3CRESEN_SEIO33_CORE_IOB
W1:JCIBMUXOUTB2→ JI3CWKPU_SEIO33_CORE_IOB
JDI_SIOLOGIC_CORE_IBASE_PIC_A→ JINDD_SIOLOGIC_CORE_IBASE_PIC_A
JDI_SIOLOGIC_CORE_IBASE_PIC_B→ JINDD_SIOLOGIC_CORE_IBASE_PIC_B
W1:JLSR0→ JLSRIN_SIOLOGIC_CORE_IBASE_PIC_A
W1:JLSR1→ JLSRIN_SIOLOGIC_CORE_IBASE_PIC_B
W1:JLSR0→ JLSROUT_SIOLOGIC_CORE_IBASE_PIC_A
W1:JLSR1→ JLSROUT_SIOLOGIC_CORE_IBASE_PIC_B
W1:JCIBMUXOUTA1→ JPADDO_SEIO33_CORE_IOB
JDOUT_SIOLOGIC_CORE_IBASE_PIC_B→ JPADDO_SEIO33_CORE_IOB
W1:JCIBMUXOUTA0→ JPADDT_SEIO33_CORE_IOB
JTOUT_SIOLOGIC_CORE_IBASE_PIC_B→ JPADDT_SEIO33_CORE_IOB
W1:JCLK0→ JSCLKIN_SIOLOGIC_CORE_IBASE_PIC_A
W1:JCLK1→ JSCLKIN_SIOLOGIC_CORE_IBASE_PIC_B
W1:JCLK0→ JSCLKOUT_SIOLOGIC_CORE_IBASE_PIC_A
W1:JCLK1→ JSCLKOUT_SIOLOGIC_CORE_IBASE_PIC_B
JTSDATA0_SIOLOGIC_CORE_IBASE_PIC_A→ JTOUT_SIOLOGIC_CORE_IBASE_PIC_A
JTSDATA0_SIOLOGIC_CORE_IBASE_PIC_B→ JTOUT_SIOLOGIC_CORE_IBASE_PIC_B
W1:JCIBMUXOUTC4→ JTSDATA0_SIOLOGIC_CORE_IBASE_PIC_A
W1:JCIBMUXOUTA0→ JTSDATA0_SIOLOGIC_CORE_IBASE_PIC_B
W1:JCIBMUXOUTC0→ JTXDATA0_SIOLOGIC_CORE_IBASE_PIC_A
W1:JCIBMUXOUTA1→ JTXDATA0_SIOLOGIC_CORE_IBASE_PIC_B
W1:JCIBMUXOUTC2→ JTXDATA1_SIOLOGIC_CORE_IBASE_PIC_A
W1:JCIBMUXOUTB7→ JTXDATA1_SIOLOGIC_CORE_IBASE_PIC_B
JRXDATA1_SIOLOGIC_CORE_IBASE_PIC_B→ W1:JF6
JRXDATA0_SIOLOGIC_CORE_IBASE_PIC_B→ W1:JF7
JINFF_SIOLOGIC_CORE_IBASE_PIC_A→ W1:JQ2
JRXDATA1_SIOLOGIC_CORE_IBASE_PIC_A→ W1:JQ3
JINDD_SIOLOGIC_CORE_IBASE_PIC_A→ W1:JQ4
JRXDATA0_SIOLOGIC_CORE_IBASE_PIC_A→ W1:JQ5
JINDD_SIOLOGIC_CORE_IBASE_PIC_B→ W1:JQ6
JPADDI_SEIO33_CORE_IOB→ W1:JQ6
JINFF_SIOLOGIC_CORE_IBASE_PIC_B→ W1:JQ7