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P |
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CONFIG_CLKRST_CORE primitive mode
| Value | F7B1 |
|---|---|
| CONFIG_CLKRST_CORE | 1 |
| NONE | - |
CONFIG_CRE_CORE primitive mode
| Value | F5B1 |
|---|---|
| CONFIG_CRE_CORE | 1 |
| NONE | - |
CONFIG_IP_CORE primitive mode
| Value | F7B1 |
|---|---|
| CONFIG_IP_CORE | 1 |
| NONE | - |
CONFIG_LMMI_CORE primitive mode
| Value | F7B1 |
|---|---|
| CONFIG_LMMI_CORE | 1 |
| NONE | - |
CONFIG_MULTIBOOT_CORE primitive mode
| Value | F7B1 |
|---|---|
| CONFIG_MULTIBOOT_CORE | 1 |
| NONE | - |
CONFIG_WDT_CORE primitive mode
| Value | F7B1 |
|---|---|
| CONFIG_WDT_CORE | 1 |
| NONE | - |
status of master SPI port after configuration
| Value | F7B1 |
|---|---|
| DISABLE | - |
| DUAL | 1 |
| QUAD | 1 |
| SERIAL | 1 |
status of slave I2C port after configuration
| Value | F7B1 |
|---|---|
| DISABLE | - |
| ENABLE | 1 |
status of slave I3C port after configuration
| Value | F7B1 |
|---|---|
| DISABLE | - |
| ENABLE | 1 |
status of slave SPI port after configuration
| Value | F7B1 |
|---|---|
| DISABLE | - |
| DUAL | 1 |
| QUAD | 1 |
| SERIAL | 1 |