EFB_1_OSC Tile Documentation

Tile Bels

NameType
OSC_CORE OSC_CORE

Config Bitmap

 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
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W
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Configuration Words

Configuration word CONFIG_IP_CORE.DSRFCTRL

CONFIG_IP_CORE.DSRFCTRL[0]F35B0
CONFIG_IP_CORE.DSRFCTRL[1]F36B0

Configuration word CONFIG_WDT_CORE.WDTVALUE

watchdog timer timeout count

CONFIG_WDT_CORE.WDTVALUE[0]F74B0
CONFIG_WDT_CORE.WDTVALUE[1]F77B0
CONFIG_WDT_CORE.WDTVALUE[2]F78B0
CONFIG_WDT_CORE.WDTVALUE[3]F79B0
CONFIG_WDT_CORE.WDTVALUE[4]F68B0
CONFIG_WDT_CORE.WDTVALUE[5]F69B0
CONFIG_WDT_CORE.WDTVALUE[6]F72B0
CONFIG_WDT_CORE.WDTVALUE[7]F73B0
CONFIG_WDT_CORE.WDTVALUE[8]F63B0
CONFIG_WDT_CORE.WDTVALUE[9]F64B0
CONFIG_WDT_CORE.WDTVALUE[10]F65B0
CONFIG_WDT_CORE.WDTVALUE[11]F67B0
CONFIG_WDT_CORE.WDTVALUE[12]F54B0
CONFIG_WDT_CORE.WDTVALUE[13]F55B0
CONFIG_WDT_CORE.WDTVALUE[14]F56B0
CONFIG_WDT_CORE.WDTVALUE[15]F58B0
CONFIG_WDT_CORE.WDTVALUE[16]F59B0
CONFIG_WDT_CORE.WDTVALUE[17]F60B0

Configuration word OSC_CORE.HF_CLK_DIV

high frequency oscillator output divider

OSC_CORE.HF_CLK_DIV[0]F10B1
OSC_CORE.HF_CLK_DIV[1]F9B1
OSC_CORE.HF_CLK_DIV[2]F8B1
OSC_CORE.HF_CLK_DIV[3]F5B1
OSC_CORE.HF_CLK_DIV[4]F4B1
OSC_CORE.HF_CLK_DIV[5]F3B1
OSC_CORE.HF_CLK_DIV[6]F1B1
OSC_CORE.HF_CLK_DIV[7]F0B1

Configuration word OSC_CORE.HF_SED_SEC_DIV

high frequency oscillator output divider

OSC_CORE.HF_SED_SEC_DIV[0]F22B1
OSC_CORE.HF_SED_SEC_DIV[1]F21B1
OSC_CORE.HF_SED_SEC_DIV[2]F18B1
OSC_CORE.HF_SED_SEC_DIV[3]F17B1
OSC_CORE.HF_SED_SEC_DIV[4]F16B1
OSC_CORE.HF_SED_SEC_DIV[5]F14B1
OSC_CORE.HF_SED_SEC_DIV[6]F13B1
OSC_CORE.HF_SED_SEC_DIV[7]F12B1

Configuration Enums

Configuration enum CONFIG_HSE_CORE.MCHSEDISABLE

Value F84B0
DIS 1
EN -

Configuration enum CONFIG_IP_CORE.MCCIBINT

Value F46B0
DIS 1
EN -

Configuration enum CONFIG_IP_CORE.MCPERSISTUI2C

keep user I2C open after configuration

Value F30B0
DIS 1
EN -

Configuration enum CONFIG_IP_CORE.MCUCLKSEL

Value F45B0
DIS 1
EN -

Configuration enum CONFIG_IP_CORE.MCUI2CAFWKUP

Value F48B0
DIS 1
EN -

Configuration enum CONFIG_IP_CORE.PERSISTI2C

keep I2C open after configuration

Value F29B0
DIS -
EN 1

Configuration enum CONFIG_IP_CORE.PERSISTMQUAD

keep master QSPI open after configuration

Value F25B0
DIS -
EN 1

Configuration enum CONFIG_IP_CORE.PERSISTMSPI

keep master SPI open after configuration

Value F20B0
DIS -
EN 1

Configuration enum CONFIG_IP_CORE.PERSISTSHEXA

keep slave 16-bit 'SPI' open after configuration

Value F22B0
DIS -
EN 1

Configuration enum CONFIG_IP_CORE.PERSISTSOCTA

keep slave 8-bit 'SPI' open after configuration

Value F27B0
DIS -
EN 1

Configuration enum CONFIG_IP_CORE.PERSISTSQUAD

keep slave QSPI open after configuration

Value F26B0
DIS -
EN 1

Configuration enum CONFIG_IP_CORE.PERSISTSSPI

keep slave SPI open after configuration

Value F21B0
DIS -
EN 1

Configuration enum CONFIG_IP_CORE.SCANEN

Value F39B0 F41B0 F44B0
DIS - - -
EN 1 1 1

Configuration enum CONFIG_IP_CORE.WLSLEW

Value F34B0
DIS -
EN 1

Configuration enum CONFIG_WDT_CORE.WDTEN

enable watchdog timer

Value F49B0
DIS -
EN 1

Configuration enum CONFIG_WDT_CORE.WDTMODE

watchdog timer mode

Value F50B0
CONTINUOUS 1
SINGLE -

Configuration enum OSC_CORE.DEBUG_N

enable debug mode

Value F23B1
DISABLED 1
ENABLED -

Configuration enum OSC_CORE.DTR_EN

Value F105B0
DISABLED -
ENABLED 1

Configuration enum OSC_CORE.HFDIV_FABRIC_EN

enable HF divider from parameter

Value F38B1
DISABLED -
ENABLED 1

Configuration enum OSC_CORE.HF_FABRIC_EN

enable HF oscillator trimming from input pins

Value F40B1
DISABLED -
ENABLED 1

Configuration enum OSC_CORE.HF_OSC_EN

enable HF oscillator

Value F41B1
DISABLED -
ENABLED 1

Configuration enum OSC_CORE.LF_FABRIC_EN

enable LF oscillator trimming from input pins

Value F56B1
DISABLED -
ENABLED 1

Configuration enum OSC_CORE.LF_OUTPUT_EN

enable LF oscillator output

Value F59B1
DISABLED -
ENABLED 1

Configuration enum SYSCONFIG.MASTER_SPI_PORT

status of master SPI port after configuration

Value F20B0 F25B0
DISABLE - -
DUAL 1 -
QUAD 1 1
SERIAL 1 -

Configuration enum SYSCONFIG.SLAVE_I2C_PORT

status of slave I2C port after configuration

Value F29B0
DISABLE -
ENABLE 1

Configuration enum SYSCONFIG.SLAVE_SPI_PORT

status of slave SPI port after configuration

Value F21B0 F26B0
DISABLE - -
DUAL 1 -
QUAD 1 1
SERIAL 1 -

Fixed Connections

SourceSink
S1:JHFCLKOUT_OSC_CORE→ G:JOSCHF_TMID_CORE_TMIDMUX
S1:JLFCLKOUT_OSC_CORE→ G:JOSCLF_TMID_CORE_TMIDMUX
S1W3:JCIBMUXOUTD3→ S1:JHFOUTEN_OSC_CORE
S1W3:JCIBMUXOUTC5→ S1:JHFSDSCEN_OSC_CORE
S1W2:JCIBMUXOUTB0→ S1:JHFTRMFAB0_OSC_CORE
S1W2:JCIBMUXOUTB1→ S1:JHFTRMFAB1_OSC_CORE
S1W2:JCIBMUXOUTB2→ S1:JHFTRMFAB2_OSC_CORE
S1W2:JCIBMUXOUTB3→ S1:JHFTRMFAB3_OSC_CORE
S1W2:JCIBMUXOUTB4→ S1:JHFTRMFAB4_OSC_CORE
S1W2:JCIBMUXOUTB5→ S1:JHFTRMFAB5_OSC_CORE
S1W2:JCIBMUXOUTB6→ S1:JHFTRMFAB6_OSC_CORE
S1W2:JCIBMUXOUTB7→ S1:JHFTRMFAB7_OSC_CORE
S1W3:JCIBMUXOUTB7→ S1:JHFTRMFAB8_OSC_CORE
S1W2:JCIBMUXOUTA0→ S1:JLFTRMFAB0_OSC_CORE
S1W2:JCIBMUXOUTA1→ S1:JLFTRMFAB1_OSC_CORE
S1W2:JCIBMUXOUTA2→ S1:JLFTRMFAB2_OSC_CORE
S1W2:JCIBMUXOUTA3→ S1:JLFTRMFAB3_OSC_CORE
S1W2:JCIBMUXOUTA4→ S1:JLFTRMFAB4_OSC_CORE
S1W2:JCIBMUXOUTA5→ S1:JLFTRMFAB5_OSC_CORE
S1W2:JCIBMUXOUTA6→ S1:JLFTRMFAB6_OSC_CORE
S1W2:JCIBMUXOUTA7→ S1:JLFTRMFAB7_OSC_CORE
S1W3:JCIBMUXOUTB6→ S1:JLFTRMFAB8_OSC_CORE
S1:JHFCLKCFG_OSC_CORE→ W4:JOSCCLK_CONFIG_CLKRST_CORE_CONFIG_CLKRST
S1:JHFSDCOUT_OSC_CORE→ W4:JSEDC_CLK_CONFIG_CLKRST_CORE_CONFIG_CLKRST