DSP_R_4 Tile Documentation

Config Bitmap

E
E
P
C
C
C
C
C
C
C
M
O
E
R
R
R
R
R
R
R
S
S
E
E
 
 
 
 
E
E
M
C
C
C
C
M
R
R
R
R
R
S
E
 
 
C
C
C
C
M
R
R
R
 
 
 
 
 
 
 
 
 
 
 
 
R
R
R
R
S
S
E
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
R
R
R
 
 
 
R
R
R
R
R
 
 
 

Configuration Enums

Configuration enum ACC54_0.CECINMUX

CECIN gating and inversion control

Value F76B0 F78B0 F80B0 F82B0
1 1 1 1 1
CECIN - - - -
INV - - - 1

Configuration enum ACC54_0.CECMUX

CEC gating and inversion control

Value F72B0 F74B0
1 1 1
CEC - -
INV - -

Configuration enum ACC54_0.RSTCMUX

RSTC gating and inversion control

Value F65B0 F66B0
0 - -
INV 1 1
RSTC 1 -

Configuration enum ACC54_0.RSTOMUX

RSTO gating and inversion control

Value F67B0 F68B0
0 - -
INV 1 1
RSTO 1 -

Configuration enum ACC54_0.SFTEN

enable variable shifter controlled by SFTCTRL

Value F69B0
DISABLED -
ENABLED 1

Configuration enum ACC54_0.SIGN

select dynamic signedness or signedness controlled by parameters

Value F70B0
DISABLED -
ENABLED 1

Configuration enum ACC54_0.STATICOPCODE_EN

operation controlled by input pins or parameters

Value F71B0
DISABLED -
ENABLED 1

Configuration enum ACC54_1.CECINMUX

CECIN gating and inversion control

Value F77B0 F79B0 F81B0 F83B0
1 1 1 1 1
CECIN - - - -
INV - - - 1

Configuration enum ACC54_1.CECMUX

CEC gating and inversion control

Value F73B0 F75B0
1 1 1
CEC - -
INV - -

Configuration enum MULT9_L1.ASIGNED_OPERAND_EN

A is signed in SIGNEDSTATIC_EN mode

Value F29B0
DISABLED -
ENABLED 1

Configuration enum MULT9_L1.BYPASS_MULT9

selects between actually doing 9x9 mult; or just passing through inputs

Value F30B0
BYPASS 1
USED -

Configuration enum MULT9_L1.CEAMUX

CEA gating and inversion control

Value F31B0 F32B0
1 1 1
CEA - -
INV - 1

Configuration enum MULT9_L1.CLKMUX

clock gating and inversion control

Value F33B0 F34B0
0 - -
CLK 1 -
INV 1 1

Configuration enum MULT9_L1.GSR

if ENABLED primitive is reset by user GSR

Value F35B0
DISABLED 0
ENABLED 1

Configuration enum MULT9_L1.MODE

MULT9_L1 primitive mode

Value F35B0 F39B0
MULT9_CORE - -
NONE 1 1

Configuration enum MULT9_L1.REGBYPSA1

register enable or bypass for A1

Value F36B0
BYPASS 1
REGISTER -

Configuration enum MULT9_L1.REGBYPSA2

register enable or bypass for A2

Value F37B0
BYPASS 1
REGISTER -

Configuration enum MULT9_L1.REGBYPSB

register enable or bypass for B

Value F38B0
BYPASS 1
REGISTER -

Configuration enum MULT9_L1.RSTAMUX

RSTA gating and inversion control

Value F39B0 F40B0
0 - -
INV 1 1
RSTA 1 -

Configuration enum MULT9_L1.SHIFTA

use shift register for A

Value F41B0
DISABLED -
ENABLED 1

Configuration enum MULT9_L1.SIGNEDSTATIC_EN

A signedness from SIGNEDSTATIC_EN (when ENABLED) or ASIGNED input

Value F42B0
DISABLED -
ENABLED 1

Configuration enum MULT9_L1.SR_18BITSHIFT_EN

use 18-bit shift register for A

Value F28B0
DISABLED -
ENABLED 1

Configuration enum PREADD9_H0.CEBMUX

CEB gating and inversion control

Value F85B0
1 1
CEB -
INV -

Configuration enum PREADD9_H0.MODE

PREADD9_H0 primitive mode

Value F93B0
NONE 1
PREADD9_CORE -

Configuration enum PREADD9_H0.RSTBMUX

RSTB gating and inversion control

Value F93B0
0 -
INV 1
RSTB 1

Configuration enum PREADD9_H1.CEBMUX

CEB gating and inversion control

Value F87B0
1 1
CEB -
INV -

Configuration enum PREADD9_H1.MODE

PREADD9_H1 primitive mode

Value F98B0
NONE 1
PREADD9_CORE -

Configuration enum PREADD9_H1.RSTBMUX

RSTB gating and inversion control

Value F98B0
0 -
INV 1
RSTB 1

Configuration enum PREADD9_H2.CEBMUX

CEB gating and inversion control

Value F89B0
1 1
CEB -
INV -

Configuration enum PREADD9_H2.MODE

PREADD9_H2 primitive mode

Value F100B0
NONE 1
PREADD9_CORE -

Configuration enum PREADD9_H2.RSTBMUX

RSTB gating and inversion control

Value F100B0
0 -
INV 1
RSTB 1

Configuration enum PREADD9_H3.CEBMUX

CEB gating and inversion control

Value F91B0
1 1
CEB -
INV -

Configuration enum PREADD9_H3.MODE

PREADD9_H3 primitive mode

Value F102B0
NONE 1
PREADD9_CORE -

Configuration enum PREADD9_H3.RSTBMUX

RSTB gating and inversion control

Value F102B0
0 -
INV 1
RSTB 1

Configuration enum PREADD9_L0.CEBMUX

CEB gating and inversion control

Value F84B0
1 1
CEB -
INV -

Configuration enum PREADD9_L0.MODE

PREADD9_L0 primitive mode

Value F92B0
NONE 1
PREADD9_CORE -

Configuration enum PREADD9_L0.RSTBMUX

RSTB gating and inversion control

Value F92B0
0 -
INV 1
RSTB 1

Configuration enum PREADD9_L1.BSIGNED_OPERAND_EN

B signedness in SIGNEDSTATIC_EN mode

Value F1B0
DISABLED -
ENABLED 1

Configuration enum PREADD9_L1.BYPASS_PREADD9

selects between pre-adder in datapath; or just passing through inputs

Value F2B0
BYPASS 1
USED -

Configuration enum PREADD9_L1.CEBMUX

CEB gating and inversion control

Value F3B0 F4B0 F86B0
1 1 1 1
CEB - - -
INV - 1 -

Configuration enum PREADD9_L1.CECLMUX

CECL gating and inversion control

Value F5B0 F6B0
1 1 1
CECL - -
INV - 1

Configuration enum PREADD9_L1.CLKMUX

clock gating and inversion control

Value F7B0 F8B0
0 - -
CLK 1 -
INV 1 1

Configuration enum PREADD9_L1.CSIGNED

C signedness in SIGNEDSTATIC_EN mode

Value F9B0
DISABLED -
ENABLED 1

Configuration enum PREADD9_L1.GSR

if ENABLED primitive is reset by user GSR

Value F10B0
DISABLED 0
ENABLED 1

Configuration enum PREADD9_L1.MODE

PREADD9_L1 primitive mode

Value F10B0 F16B0 F18B0 F94B0
NONE 1 1 1 1
PREADD9_CORE - - - -

Configuration enum PREADD9_L1.OPC

selects 2nd pre-adder operand

Value F11B0
INPUT_B_AS_PREADDER_OPERAND -
INPUT_C_AS_PREADDER_OPERAND 1

Configuration enum PREADD9_L1.PREADDCAS_EN

enable pre-adder carry cascade

Value F12B0
DISABLED -
ENABLED 1

Configuration enum PREADD9_L1.REGBYPSBL

register enable or bypass for BL

Value F13B0
BYPASS 1
REGISTER -

Configuration enum PREADD9_L1.REGBYPSBR0

register enable or bypass for BR0

Value F14B0
BYPASS 1
REGISTER -

Configuration enum PREADD9_L1.REGBYPSBR1

register enable or bypass for BR1

Value F15B0
BYPASS 1
REGISTER -

Configuration enum PREADD9_L1.RSTBMUX

RSTB gating and inversion control

Value F16B0 F17B0 F94B0
0 - - -
INV 1 1 1
RSTB 1 - 1

Configuration enum PREADD9_L1.RSTCLMUX

RSTCL gating and inversion control

Value F18B0 F19B0
0 - -
INV 1 1
RSTCL 1 -

Configuration enum PREADD9_L1.SHIFTBL

use left shift register for B

Value F20B0
BYPASS 1
REGISTER -

Configuration enum PREADD9_L1.SHIFTBR

use right shift register for B

Value F21B0
BYPASS 1
REGISTER -

Configuration enum PREADD9_L1.SIGNEDSTATIC_EN

B and C signedness from parameters (ENABLED) or inputs

Value F22B0
DISABLED -
ENABLED 1

Configuration enum PREADD9_L1.SR_18BITSHIFT_EN

use 18-bit shift register for B

Value F0B0
DISABLED -
ENABLED 1

Configuration enum PREADD9_L1.SUBSTRACT_EN

preadder function

Value F23B0
ADDITION 1
SUBTRACTION -

Configuration enum PREADD9_L2.CEBMUX

CEB gating and inversion control

Value F88B0
1 1
CEB -
INV -

Configuration enum PREADD9_L2.MODE

PREADD9_L2 primitive mode

Value F99B0
NONE 1
PREADD9_CORE -

Configuration enum PREADD9_L2.RSTBMUX

RSTB gating and inversion control

Value F99B0
0 -
INV 1
RSTB 1

Configuration enum PREADD9_L3.CEBMUX

CEB gating and inversion control

Value F90B0
1 1
CEB -
INV -

Configuration enum PREADD9_L3.MODE

PREADD9_L3 primitive mode

Value F101B0
NONE 1
PREADD9_CORE -

Configuration enum PREADD9_L3.RSTBMUX

RSTB gating and inversion control

Value F101B0
0 -
INV 1
RSTB 1

Configuration enum REG18_L1_0.CEPMUX

CEP gating and inversion control

Value F45B0 F46B0
1 1 1
CEP - -
INV - 1

Configuration enum REG18_L1_0.CLKMUX

clock gating and inversion control

Value F47B0 F48B0
0 - -
CLK 1 -
INV 1 1

Configuration enum REG18_L1_0.GSR

if ENABLED primitive is reset by user GSR

Value F49B0
DISABLED 0
ENABLED 1

Configuration enum REG18_L1_0.MODE

REG18_L1_0 primitive mode

Value F49B0 F51B0
NONE 1 1
REG18_CORE - -

Configuration enum REG18_L1_0.REGBYPS

register enable or bypass

Value F50B0
BYPASS 1
REGISTER -

Configuration enum REG18_L1_0.RSTPMUX

RSTP gating and inversion control

Value F51B0 F52B0
0 - -
INV 1 1
RSTP 1 -