| Name | Type |
|---|---|
| PREADD9_L0 | PREADD9_CORE |
| PREADD9_H0 | PREADD9_CORE |
| MULT9_L0 | MULT9_CORE |
| MULT9_H0 | MULT9_CORE |
| MULT18_0 | MULT18_CORE |
|
E |
E |
P |
C |
C |
C |
C |
C |
C |
C |
M |
O |
E |
R |
R |
R |
R |
R |
R |
R |
S |
S |
E |
E |
|
|
|
|
E |
E |
M |
C |
C |
C |
C |
M |
R |
R |
R |
R |
R |
S |
E |
|
|
|
|
|
|
|
C |
C |
C |
C |
M |
R |
R |
R |
|
|
A |
M |
A |
A |
A |
C |
C |
A |
A |
A |
C |
C |
C |
C |
C |
C |
C |
C |
C |
C |
C |
C |
C |
C |
D |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
cascade carry of two ACC54s to create a 108-bit accumulator
| Value | F60B0 |
|---|---|
| BYPASSCASCADE | - |
| CASCADE2ACCU54TOFORMACCU108 | 1 |
accumulator bypass
| Value | F61B0 |
|---|---|
| BYPASS | 1 |
| USED | - |
accumulator mode
| Value | F62B0 | F63B0 | F64B0 |
|---|---|---|---|
| MODE0 | - | - | - |
| MODE1 | 1 | - | - |
| MODE2 | - | 1 | - |
| MODE3 | 1 | 1 | - |
| MODE4 | - | - | 1 |
| MODE5 | 1 | - | 1 |
| MODE6 | - | 1 | 1 |
| MODE7 | 1 | 1 | 1 |
ADDSUBSIGN register 1 enable or bypass
| Value | F67B0 |
|---|---|
| BYPASS | 1 |
| REGISTER | - |
ADDSUBSIGN register 2 enable or bypass
| Value | F68B0 |
|---|---|
| BYPASS | 1 |
| REGISTER | - |
ADDSUBSIGN register 3 enable or bypass
| Value | F69B0 |
|---|---|
| BYPASS | 1 |
| REGISTER | - |
select stage 2 operation in static opcode mode
| Value | F65B0 | F66B0 |
|---|---|---|
| ADD_ADD_CTRL_54_BIT_ADDER | - | - |
| ADD_SUB_CTRL_54_BIT_ADDER | - | 1 |
| SUB_ADD_CTRL_54_BIT_ADDER | 1 | - |
| SUB_SUB_CTRL_54_BIT_ADDER | 1 | 1 |
cascade output register enable or bypass
| Value | F70B0 |
|---|---|
| BYPASS | 1 |
| REGISTER | - |
CEC gating and inversion control
| Value | F71B0 | F72B0 |
|---|---|---|
| 1 | 1 | 1 |
| CEC | - | - |
| INV | - | 1 |
CEO gating and inversion control
| Value | F73B0 | F74B0 |
|---|---|---|
| 1 | 1 | 1 |
| CEO | - | - |
| INV | - | 1 |
CIN register 1 enable or bypass
| Value | F75B0 |
|---|---|
| BYPASS | 1 |
| REGISTER | - |
CIN register 2 enable or bypass
| Value | F76B0 |
|---|---|
| BYPASS | 1 |
| REGISTER | - |
CIN register 3 enable or bypass
| Value | F77B0 |
|---|---|
| BYPASS | 1 |
| REGISTER | - |
clock gating and inversion control
| Value | F78B0 | F79B0 |
|---|---|---|
| 0 | - | - |
| CLK | 1 | - |
| INV | 1 | 1 |
if SELECT then use PROGCONST for C operand
| Value | F80B0 |
|---|---|
| BYPASS | - |
| SELECT | 1 |
C register 1 enable or bypass
| Value | F81B0 |
|---|---|
| BYPASS | 1 |
| REGISTER | - |
C register 2 enable or bypass
| Value | F82B0 |
|---|---|
| BYPASS | 1 |
| REGISTER | - |
C register 3 enable or bypass
| Value | F83B0 |
|---|---|
| BYPASS | 1 |
| REGISTER | - |
enable DSP cascading
| Value | F84B0 |
|---|---|
| DISABLED | - |
| ENABLED | 1 |
ACC54_0 primitive mode
| Value | F61B0 |
|---|---|
| ACC54_CORE | - |
| NONE | 1 |
A is signed in SIGNEDSTATIC_EN mode
| Value | F29B0 |
|---|---|
| DISABLED | - |
| ENABLED | 1 |
selects between actually doing 9x9 mult; or just passing through inputs
| Value | F30B0 |
|---|---|
| BYPASS | 1 |
| USED | - |
CEA gating and inversion control
| Value | F31B0 | F32B0 |
|---|---|---|
| 1 | 1 | 1 |
| CEA | - | - |
| INV | - | 1 |
clock gating and inversion control
| Value | F33B0 | F34B0 |
|---|---|---|
| 0 | - | - |
| CLK | 1 | - |
| INV | 1 | 1 |
if ENABLED primitive is reset by user GSR
| Value | F35B0 |
|---|---|
| DISABLED | 0 |
| ENABLED | 1 |
MULT9_L0 primitive mode
| Value | F35B0 | F39B0 |
|---|---|---|
| MULT9_CORE | - | - |
| NONE | 1 | 1 |
register enable or bypass for A1
| Value | F36B0 |
|---|---|
| BYPASS | 1 |
| REGISTER | - |
register enable or bypass for A2
| Value | F37B0 |
|---|---|
| BYPASS | 1 |
| REGISTER | - |
register enable or bypass for B
| Value | F38B0 |
|---|---|
| BYPASS | 1 |
| REGISTER | - |
RSTA gating and inversion control
| Value | F39B0 | F40B0 |
|---|---|---|
| 0 | - | - |
| INV | 1 | 1 |
| RSTA | 1 | - |
use shift register for A
| Value | F41B0 |
|---|---|
| DISABLED | - |
| ENABLED | 1 |
A signedness from SIGNEDSTATIC_EN (when ENABLED) or ASIGNED input
| Value | F42B0 |
|---|---|
| DISABLED | - |
| ENABLED | 1 |
use 18-bit shift register for A
| Value | F28B0 |
|---|---|
| DISABLED | - |
| ENABLED | 1 |
B signedness in SIGNEDSTATIC_EN mode
| Value | F1B0 |
|---|---|
| DISABLED | - |
| ENABLED | 1 |
selects between pre-adder in datapath; or just passing through inputs
| Value | F2B0 |
|---|---|
| BYPASS | 1 |
| USED | - |
CEB gating and inversion control
| Value | F3B0 | F4B0 |
|---|---|---|
| 1 | 1 | 1 |
| CEB | - | - |
| INV | - | 1 |
CECL gating and inversion control
| Value | F5B0 | F6B0 |
|---|---|---|
| 1 | 1 | 1 |
| CECL | - | - |
| INV | - | 1 |
clock gating and inversion control
| Value | F7B0 | F8B0 |
|---|---|---|
| 0 | - | - |
| CLK | 1 | - |
| INV | 1 | 1 |
C signedness in SIGNEDSTATIC_EN mode
| Value | F9B0 |
|---|---|
| DISABLED | - |
| ENABLED | 1 |
if ENABLED primitive is reset by user GSR
| Value | F10B0 |
|---|---|
| DISABLED | 0 |
| ENABLED | 1 |
PREADD9_L0 primitive mode
| Value | F10B0 | F16B0 | F18B0 |
|---|---|---|---|
| NONE | 1 | 1 | 1 |
| PREADD9_CORE | - | - | - |
selects 2nd pre-adder operand
| Value | F11B0 |
|---|---|
| INPUT_B_AS_PREADDER_OPERAND | - |
| INPUT_C_AS_PREADDER_OPERAND | 1 |
enable pre-adder carry cascade
| Value | F12B0 |
|---|---|
| DISABLED | - |
| ENABLED | 1 |
register enable or bypass for BL
| Value | F13B0 |
|---|---|
| BYPASS | 1 |
| REGISTER | - |
register enable or bypass for BR0
| Value | F14B0 |
|---|---|
| BYPASS | 1 |
| REGISTER | - |
register enable or bypass for BR1
| Value | F15B0 |
|---|---|
| BYPASS | 1 |
| REGISTER | - |
RSTB gating and inversion control
| Value | F16B0 | F17B0 |
|---|---|---|
| 0 | - | - |
| INV | 1 | 1 |
| RSTB | 1 | - |
RSTCL gating and inversion control
| Value | F18B0 | F19B0 |
|---|---|---|
| 0 | - | - |
| INV | 1 | 1 |
| RSTCL | 1 | - |
use left shift register for B
| Value | F20B0 |
|---|---|
| BYPASS | 1 |
| REGISTER | - |
use right shift register for B
| Value | F21B0 |
|---|---|
| BYPASS | 1 |
| REGISTER | - |
B and C signedness from parameters (ENABLED) or inputs
| Value | F22B0 |
|---|---|
| DISABLED | - |
| ENABLED | 1 |
use 18-bit shift register for B
| Value | F0B0 |
|---|---|
| DISABLED | - |
| ENABLED | 1 |
preadder function
| Value | F23B0 |
|---|---|
| ADDITION | 1 |
| SUBTRACTION | - |
CEP gating and inversion control
| Value | F50B0 | F51B0 |
|---|---|---|
| 1 | 1 | 1 |
| CEP | - | - |
| INV | - | 1 |
clock gating and inversion control
| Value | F52B0 | F53B0 |
|---|---|---|
| 0 | - | - |
| CLK | 1 | - |
| INV | 1 | 1 |
if ENABLED primitive is reset by user GSR
| Value | F54B0 |
|---|---|
| DISABLED | 0 |
| ENABLED | 1 |
REG18_L0_0 primitive mode
| Value | F54B0 | F56B0 |
|---|---|---|
| NONE | 1 | 1 |
| REG18_CORE | - | - |
register enable or bypass
| Value | F55B0 |
|---|---|
| BYPASS | 1 |
| REGISTER | - |
RSTP gating and inversion control
| Value | F56B0 | F57B0 |
|---|---|---|
| 0 | - | - |
| INV | 1 | 1 |
| RSTP | 1 | - |
| Source | Sink | |
|---|---|---|
| N1E1:JCIBMUXOUTA1 | → | N1:JA0_MULT9_CORE_MULT9_H0 |
| N1:JCIBMUXOUTA0 | → | N1:JA0_MULT9_CORE_MULT9_L0 |
| N1E1:JCIBMUXOUTA2 | → | N1:JA1_MULT9_CORE_MULT9_H0 |
| N1:JCIBMUXOUTA1 | → | N1:JA1_MULT9_CORE_MULT9_L0 |
| N1E1:JCIBMUXOUTA3 | → | N1:JA2_MULT9_CORE_MULT9_H0 |
| N1:JCIBMUXOUTA2 | → | N1:JA2_MULT9_CORE_MULT9_L0 |
| N1E1:JCIBMUXOUTA4 | → | N1:JA3_MULT9_CORE_MULT9_H0 |
| N1:JCIBMUXOUTA3 | → | N1:JA3_MULT9_CORE_MULT9_L0 |
| N1E1:JCIBMUXOUTA5 | → | N1:JA4_MULT9_CORE_MULT9_H0 |
| N1:JCIBMUXOUTA4 | → | N1:JA4_MULT9_CORE_MULT9_L0 |
| N1E1:JCIBMUXOUTA6 | → | N1:JA5_MULT9_CORE_MULT9_H0 |
| N1:JCIBMUXOUTA5 | → | N1:JA5_MULT9_CORE_MULT9_L0 |
| N1E1:JCIBMUXOUTA7 | → | N1:JA6_MULT9_CORE_MULT9_H0 |
| N1:JCIBMUXOUTA6 | → | N1:JA6_MULT9_CORE_MULT9_L0 |
| N1E2:JCIBMUXOUTA0 | → | N1:JA7_MULT9_CORE_MULT9_H0 |
| N1:JCIBMUXOUTA7 | → | N1:JA7_MULT9_CORE_MULT9_L0 |
| N1E2:JCIBMUXOUTA1 | → | N1:JA8_MULT9_CORE_MULT9_H0 |
| N1E1:JCIBMUXOUTA0 | → | N1:JA8_MULT9_CORE_MULT9_L0 |
| N1:JAO0_MULT9_CORE_MULT9_H0 | → | N1:JARH0_MULT18_CORE_MULT18_0 |
| N1:JAO1_MULT9_CORE_MULT9_H0 | → | N1:JARH1_MULT18_CORE_MULT18_0 |
| N1:JAO2_MULT9_CORE_MULT9_H0 | → | N1:JARH2_MULT18_CORE_MULT18_0 |
| N1:JAO3_MULT9_CORE_MULT9_H0 | → | N1:JARH3_MULT18_CORE_MULT18_0 |
| N1:JAO4_MULT9_CORE_MULT9_H0 | → | N1:JARH4_MULT18_CORE_MULT18_0 |
| N1:JAO5_MULT9_CORE_MULT9_H0 | → | N1:JARH5_MULT18_CORE_MULT18_0 |
| N1:JAO6_MULT9_CORE_MULT9_H0 | → | N1:JARH6_MULT18_CORE_MULT18_0 |
| N1:JAO7_MULT9_CORE_MULT9_H0 | → | N1:JARH7_MULT18_CORE_MULT18_0 |
| N1:JAO8_MULT9_CORE_MULT9_H0 | → | N1:JARH8_MULT18_CORE_MULT18_0 |
| N1:JAOSIGNED_MULT9_CORE_MULT9_H0 | → | N1:JARHSIGN_MULT18_CORE_MULT18_0 |
| N1:JAO0_MULT9_CORE_MULT9_L0 | → | N1:JARL0_MULT18_CORE_MULT18_0 |
| N1:JAO1_MULT9_CORE_MULT9_L0 | → | N1:JARL1_MULT18_CORE_MULT18_0 |
| N1:JAO2_MULT9_CORE_MULT9_L0 | → | N1:JARL2_MULT18_CORE_MULT18_0 |
| N1:JAO3_MULT9_CORE_MULT9_L0 | → | N1:JARL3_MULT18_CORE_MULT18_0 |
| N1:JAO4_MULT9_CORE_MULT9_L0 | → | N1:JARL4_MULT18_CORE_MULT18_0 |
| N1:JAO5_MULT9_CORE_MULT9_L0 | → | N1:JARL5_MULT18_CORE_MULT18_0 |
| N1:JAO6_MULT9_CORE_MULT9_L0 | → | N1:JARL6_MULT18_CORE_MULT18_0 |
| N1:JAO7_MULT9_CORE_MULT9_L0 | → | N1:JARL7_MULT18_CORE_MULT18_0 |
| N1:JAO8_MULT9_CORE_MULT9_L0 | → | N1:JARL8_MULT18_CORE_MULT18_0 |
| N1:JAR0_MULT9_CORE_MULT9_L0 | → | N1:JAS10_MULT9_CORE_MULT9_H0 |
| N1W7:JAR0_MULT9_CORE_MULT9_H3 | → | N1:JAS10_MULT9_CORE_MULT9_L0 |
| N1:JAR1_MULT9_CORE_MULT9_L0 | → | N1:JAS11_MULT9_CORE_MULT9_H0 |
| N1W7:JAR1_MULT9_CORE_MULT9_H3 | → | N1:JAS11_MULT9_CORE_MULT9_L0 |
| N1:JAR2_MULT9_CORE_MULT9_L0 | → | N1:JAS12_MULT9_CORE_MULT9_H0 |
| N1W7:JAR2_MULT9_CORE_MULT9_H3 | → | N1:JAS12_MULT9_CORE_MULT9_L0 |
| N1:JAR3_MULT9_CORE_MULT9_L0 | → | N1:JAS13_MULT9_CORE_MULT9_H0 |
| N1W7:JAR3_MULT9_CORE_MULT9_H3 | → | N1:JAS13_MULT9_CORE_MULT9_L0 |
| N1:JAR4_MULT9_CORE_MULT9_L0 | → | N1:JAS14_MULT9_CORE_MULT9_H0 |
| N1W7:JAR4_MULT9_CORE_MULT9_H3 | → | N1:JAS14_MULT9_CORE_MULT9_L0 |
| N1:JAR5_MULT9_CORE_MULT9_L0 | → | N1:JAS15_MULT9_CORE_MULT9_H0 |
| N1W7:JAR5_MULT9_CORE_MULT9_H3 | → | N1:JAS15_MULT9_CORE_MULT9_L0 |
| N1:JAR6_MULT9_CORE_MULT9_L0 | → | N1:JAS16_MULT9_CORE_MULT9_H0 |
| N1W7:JAR6_MULT9_CORE_MULT9_H3 | → | N1:JAS16_MULT9_CORE_MULT9_L0 |
| N1:JAR7_MULT9_CORE_MULT9_L0 | → | N1:JAS17_MULT9_CORE_MULT9_H0 |
| N1W7:JAR7_MULT9_CORE_MULT9_H3 | → | N1:JAS17_MULT9_CORE_MULT9_L0 |
| N1:JAR8_MULT9_CORE_MULT9_L0 | → | N1:JAS18_MULT9_CORE_MULT9_H0 |
| N1W7:JAR8_MULT9_CORE_MULT9_H3 | → | N1:JAS18_MULT9_CORE_MULT9_L0 |
| N1W7:JAR0_MULT9_CORE_MULT9_H3 | → | N1:JAS20_MULT9_CORE_MULT9_H0 |
| N1W7:JAR0_MULT9_CORE_MULT9_L3 | → | N1:JAS20_MULT9_CORE_MULT9_L0 |
| N1W7:JAR1_MULT9_CORE_MULT9_H3 | → | N1:JAS21_MULT9_CORE_MULT9_H0 |
| N1W7:JAR1_MULT9_CORE_MULT9_L3 | → | N1:JAS21_MULT9_CORE_MULT9_L0 |
| N1W7:JAR2_MULT9_CORE_MULT9_H3 | → | N1:JAS22_MULT9_CORE_MULT9_H0 |
| N1W7:JAR2_MULT9_CORE_MULT9_L3 | → | N1:JAS22_MULT9_CORE_MULT9_L0 |
| N1W7:JAR3_MULT9_CORE_MULT9_H3 | → | N1:JAS23_MULT9_CORE_MULT9_H0 |
| N1W7:JAR3_MULT9_CORE_MULT9_L3 | → | N1:JAS23_MULT9_CORE_MULT9_L0 |
| N1W7:JAR4_MULT9_CORE_MULT9_H3 | → | N1:JAS24_MULT9_CORE_MULT9_H0 |
| N1W7:JAR4_MULT9_CORE_MULT9_L3 | → | N1:JAS24_MULT9_CORE_MULT9_L0 |
| N1W7:JAR5_MULT9_CORE_MULT9_H3 | → | N1:JAS25_MULT9_CORE_MULT9_H0 |
| N1W7:JAR5_MULT9_CORE_MULT9_L3 | → | N1:JAS25_MULT9_CORE_MULT9_L0 |
| N1W7:JAR6_MULT9_CORE_MULT9_H3 | → | N1:JAS26_MULT9_CORE_MULT9_H0 |
| N1W7:JAR6_MULT9_CORE_MULT9_L3 | → | N1:JAS26_MULT9_CORE_MULT9_L0 |
| N1W7:JAR7_MULT9_CORE_MULT9_H3 | → | N1:JAS27_MULT9_CORE_MULT9_H0 |
| N1W7:JAR7_MULT9_CORE_MULT9_L3 | → | N1:JAS27_MULT9_CORE_MULT9_L0 |
| N1W7:JAR8_MULT9_CORE_MULT9_H3 | → | N1:JAS28_MULT9_CORE_MULT9_H0 |
| N1W7:JAR8_MULT9_CORE_MULT9_L3 | → | N1:JAS28_MULT9_CORE_MULT9_L0 |
| N1E3:JCIBMUXOUTD1 | → | N1:JASIGNED_MULT9_CORE_MULT9_H0 |
| N1E3:JCIBMUXOUTD0 | → | N1:JASIGNED_MULT9_CORE_MULT9_L0 |
| N1:JARSIGNED_MULT9_CORE_MULT9_L0 | → | N1:JASSIGNED1_MULT9_CORE_MULT9_H0 |
| N1W7:JARSIGNED_MULT9_CORE_MULT9_H3 | → | N1:JASSIGNED1_MULT9_CORE_MULT9_L0 |
| N1W7:JARSIGNED_MULT9_CORE_MULT9_H3 | → | N1:JASSIGNED2_MULT9_CORE_MULT9_H0 |
| N1W7:JARSIGNED_MULT9_CORE_MULT9_L3 | → | N1:JASSIGNED2_MULT9_CORE_MULT9_L0 |
| N1E1:JCIBMUXOUTB1 | → | N1:JB0_PREADD9_CORE_PREADD9_H0 |
| N1:JCIBMUXOUTB0 | → | N1:JB0_PREADD9_CORE_PREADD9_L0 |
| N1E1:JCIBMUXOUTB2 | → | N1:JB1_PREADD9_CORE_PREADD9_H0 |
| N1:JCIBMUXOUTB1 | → | N1:JB1_PREADD9_CORE_PREADD9_L0 |
| N1E1:JCIBMUXOUTB3 | → | N1:JB2_PREADD9_CORE_PREADD9_H0 |
| N1:JCIBMUXOUTB2 | → | N1:JB2_PREADD9_CORE_PREADD9_L0 |
| N1E1:JCIBMUXOUTB4 | → | N1:JB3_PREADD9_CORE_PREADD9_H0 |
| N1:JCIBMUXOUTB3 | → | N1:JB3_PREADD9_CORE_PREADD9_L0 |
| N1E1:JCIBMUXOUTB5 | → | N1:JB4_PREADD9_CORE_PREADD9_H0 |
| N1:JCIBMUXOUTB4 | → | N1:JB4_PREADD9_CORE_PREADD9_L0 |
| N1E1:JCIBMUXOUTB6 | → | N1:JB5_PREADD9_CORE_PREADD9_H0 |
| N1:JCIBMUXOUTB5 | → | N1:JB5_PREADD9_CORE_PREADD9_L0 |
| N1E1:JCIBMUXOUTB7 | → | N1:JB6_PREADD9_CORE_PREADD9_H0 |
| N1:JCIBMUXOUTB6 | → | N1:JB6_PREADD9_CORE_PREADD9_L0 |
| N1E2:JCIBMUXOUTB0 | → | N1:JB7_PREADD9_CORE_PREADD9_H0 |
| N1:JCIBMUXOUTB7 | → | N1:JB7_PREADD9_CORE_PREADD9_L0 |
| N1E2:JCIBMUXOUTB1 | → | N1:JB8_PREADD9_CORE_PREADD9_H0 |
| N1E1:JCIBMUXOUTB0 | → | N1:JB8_PREADD9_CORE_PREADD9_L0 |
| N1E1:JBLSO0_PREADD9_CORE_PREADD9_L1 | → | N1:JBLS10_PREADD9_CORE_PREADD9_H0 |
| N1:JBLSO0_PREADD9_CORE_PREADD9_H0 | → | N1:JBLS10_PREADD9_CORE_PREADD9_L0 |
| N1E1:JBLSO1_PREADD9_CORE_PREADD9_L1 | → | N1:JBLS11_PREADD9_CORE_PREADD9_H0 |
| N1:JBLSO1_PREADD9_CORE_PREADD9_H0 | → | N1:JBLS11_PREADD9_CORE_PREADD9_L0 |
| N1E1:JBLSO2_PREADD9_CORE_PREADD9_L1 | → | N1:JBLS12_PREADD9_CORE_PREADD9_H0 |
| N1:JBLSO2_PREADD9_CORE_PREADD9_H0 | → | N1:JBLS12_PREADD9_CORE_PREADD9_L0 |
| N1E1:JBLSO3_PREADD9_CORE_PREADD9_L1 | → | N1:JBLS13_PREADD9_CORE_PREADD9_H0 |
| N1:JBLSO3_PREADD9_CORE_PREADD9_H0 | → | N1:JBLS13_PREADD9_CORE_PREADD9_L0 |
| N1E1:JBLSO4_PREADD9_CORE_PREADD9_L1 | → | N1:JBLS14_PREADD9_CORE_PREADD9_H0 |
| N1:JBLSO4_PREADD9_CORE_PREADD9_H0 | → | N1:JBLS14_PREADD9_CORE_PREADD9_L0 |
| N1E1:JBLSO5_PREADD9_CORE_PREADD9_L1 | → | N1:JBLS15_PREADD9_CORE_PREADD9_H0 |
| N1:JBLSO5_PREADD9_CORE_PREADD9_H0 | → | N1:JBLS15_PREADD9_CORE_PREADD9_L0 |
| N1E1:JBLSO6_PREADD9_CORE_PREADD9_L1 | → | N1:JBLS16_PREADD9_CORE_PREADD9_H0 |
| N1:JBLSO6_PREADD9_CORE_PREADD9_H0 | → | N1:JBLS16_PREADD9_CORE_PREADD9_L0 |
| N1E1:JBLSO7_PREADD9_CORE_PREADD9_L1 | → | N1:JBLS17_PREADD9_CORE_PREADD9_H0 |
| N1:JBLSO7_PREADD9_CORE_PREADD9_H0 | → | N1:JBLS17_PREADD9_CORE_PREADD9_L0 |
| N1E1:JBLSO8_PREADD9_CORE_PREADD9_L1 | → | N1:JBLS18_PREADD9_CORE_PREADD9_H0 |
| N1:JBLSO8_PREADD9_CORE_PREADD9_H0 | → | N1:JBLS18_PREADD9_CORE_PREADD9_L0 |
| N1E1:JBLSO0_PREADD9_CORE_PREADD9_H1 | → | N1:JBLS20_PREADD9_CORE_PREADD9_H0 |
| N1E1:JBLSO0_PREADD9_CORE_PREADD9_L1 | → | N1:JBLS20_PREADD9_CORE_PREADD9_L0 |
| N1E1:JBLSO1_PREADD9_CORE_PREADD9_H1 | → | N1:JBLS21_PREADD9_CORE_PREADD9_H0 |
| N1E1:JBLSO1_PREADD9_CORE_PREADD9_L1 | → | N1:JBLS21_PREADD9_CORE_PREADD9_L0 |
| N1E1:JBLSO2_PREADD9_CORE_PREADD9_H1 | → | N1:JBLS22_PREADD9_CORE_PREADD9_H0 |
| N1E1:JBLSO2_PREADD9_CORE_PREADD9_L1 | → | N1:JBLS22_PREADD9_CORE_PREADD9_L0 |
| N1E1:JBLSO3_PREADD9_CORE_PREADD9_H1 | → | N1:JBLS23_PREADD9_CORE_PREADD9_H0 |
| N1E1:JBLSO3_PREADD9_CORE_PREADD9_L1 | → | N1:JBLS23_PREADD9_CORE_PREADD9_L0 |
| N1E1:JBLSO4_PREADD9_CORE_PREADD9_H1 | → | N1:JBLS24_PREADD9_CORE_PREADD9_H0 |
| N1E1:JBLSO4_PREADD9_CORE_PREADD9_L1 | → | N1:JBLS24_PREADD9_CORE_PREADD9_L0 |
| N1E1:JBLSO5_PREADD9_CORE_PREADD9_H1 | → | N1:JBLS25_PREADD9_CORE_PREADD9_H0 |
| N1E1:JBLSO5_PREADD9_CORE_PREADD9_L1 | → | N1:JBLS25_PREADD9_CORE_PREADD9_L0 |
| N1E1:JBLSO6_PREADD9_CORE_PREADD9_H1 | → | N1:JBLS26_PREADD9_CORE_PREADD9_H0 |
| N1E1:JBLSO6_PREADD9_CORE_PREADD9_L1 | → | N1:JBLS26_PREADD9_CORE_PREADD9_L0 |
| N1E1:JBLSO7_PREADD9_CORE_PREADD9_H1 | → | N1:JBLS27_PREADD9_CORE_PREADD9_H0 |
| N1E1:JBLSO7_PREADD9_CORE_PREADD9_L1 | → | N1:JBLS27_PREADD9_CORE_PREADD9_L0 |
| N1E1:JBLSO8_PREADD9_CORE_PREADD9_H1 | → | N1:JBLS28_PREADD9_CORE_PREADD9_H0 |
| N1E1:JBLSO8_PREADD9_CORE_PREADD9_L1 | → | N1:JBLS28_PREADD9_CORE_PREADD9_L0 |
| N1E1:JBLSOSGND_PREADD9_CORE_PREADD9_L1 | → | N1:JBLSS1_PREADD9_CORE_PREADD9_H0 |
| N1:JBLSOSGND_PREADD9_CORE_PREADD9_H0 | → | N1:JBLSS1_PREADD9_CORE_PREADD9_L0 |
| N1E1:JBLSOSGND_PREADD9_CORE_PREADD9_H1 | → | N1:JBLSS2_PREADD9_CORE_PREADD9_H0 |
| N1E1:JBLSOSGND_PREADD9_CORE_PREADD9_L1 | → | N1:JBLSS2_PREADD9_CORE_PREADD9_L0 |
| N1:JBR0_PREADD9_CORE_PREADD9_H0 | → | N1:JBR0_MULT9_CORE_MULT9_H0 |
| N1:JBR0_PREADD9_CORE_PREADD9_L0 | → | N1:JBR0_MULT9_CORE_MULT9_L0 |
| N1:JBR1_PREADD9_CORE_PREADD9_H0 | → | N1:JBR1_MULT9_CORE_MULT9_H0 |
| N1:JBR1_PREADD9_CORE_PREADD9_L0 | → | N1:JBR1_MULT9_CORE_MULT9_L0 |
| N1:JBR2_PREADD9_CORE_PREADD9_H0 | → | N1:JBR2_MULT9_CORE_MULT9_H0 |
| N1:JBR2_PREADD9_CORE_PREADD9_L0 | → | N1:JBR2_MULT9_CORE_MULT9_L0 |
| N1:JBR3_PREADD9_CORE_PREADD9_H0 | → | N1:JBR3_MULT9_CORE_MULT9_H0 |
| N1:JBR3_PREADD9_CORE_PREADD9_L0 | → | N1:JBR3_MULT9_CORE_MULT9_L0 |
| N1:JBR4_PREADD9_CORE_PREADD9_H0 | → | N1:JBR4_MULT9_CORE_MULT9_H0 |
| N1:JBR4_PREADD9_CORE_PREADD9_L0 | → | N1:JBR4_MULT9_CORE_MULT9_L0 |
| N1:JBR5_PREADD9_CORE_PREADD9_H0 | → | N1:JBR5_MULT9_CORE_MULT9_H0 |
| N1:JBR5_PREADD9_CORE_PREADD9_L0 | → | N1:JBR5_MULT9_CORE_MULT9_L0 |
| N1:JBR6_PREADD9_CORE_PREADD9_H0 | → | N1:JBR6_MULT9_CORE_MULT9_H0 |
| N1:JBR6_PREADD9_CORE_PREADD9_L0 | → | N1:JBR6_MULT9_CORE_MULT9_L0 |
| N1:JBR7_PREADD9_CORE_PREADD9_H0 | → | N1:JBR7_MULT9_CORE_MULT9_H0 |
| N1:JBR7_PREADD9_CORE_PREADD9_L0 | → | N1:JBR7_MULT9_CORE_MULT9_L0 |
| N1:JBR8_PREADD9_CORE_PREADD9_H0 | → | N1:JBR8_MULT9_CORE_MULT9_H0 |
| N1:JBR8_PREADD9_CORE_PREADD9_L0 | → | N1:JBR8_MULT9_CORE_MULT9_L0 |
| N1:JBO0_MULT9_CORE_MULT9_H0 | → | N1:JBRH0_MULT18_CORE_MULT18_0 |
| N1:JBO1_MULT9_CORE_MULT9_H0 | → | N1:JBRH1_MULT18_CORE_MULT18_0 |
| N1:JBO2_MULT9_CORE_MULT9_H0 | → | N1:JBRH2_MULT18_CORE_MULT18_0 |
| N1:JBO3_MULT9_CORE_MULT9_H0 | → | N1:JBRH3_MULT18_CORE_MULT18_0 |
| N1:JBO4_MULT9_CORE_MULT9_H0 | → | N1:JBRH4_MULT18_CORE_MULT18_0 |
| N1:JBO5_MULT9_CORE_MULT9_H0 | → | N1:JBRH5_MULT18_CORE_MULT18_0 |
| N1:JBO6_MULT9_CORE_MULT9_H0 | → | N1:JBRH6_MULT18_CORE_MULT18_0 |
| N1:JBO7_MULT9_CORE_MULT9_H0 | → | N1:JBRH7_MULT18_CORE_MULT18_0 |
| N1:JBO8_MULT9_CORE_MULT9_H0 | → | N1:JBRH8_MULT18_CORE_MULT18_0 |
| N1:JBOSIGNED_MULT9_CORE_MULT9_H0 | → | N1:JBRHSIGN_MULT18_CORE_MULT18_0 |
| N1:JBO0_MULT9_CORE_MULT9_L0 | → | N1:JBRL0_MULT18_CORE_MULT18_0 |
| N1:JBO1_MULT9_CORE_MULT9_L0 | → | N1:JBRL1_MULT18_CORE_MULT18_0 |
| N1:JBO2_MULT9_CORE_MULT9_L0 | → | N1:JBRL2_MULT18_CORE_MULT18_0 |
| N1:JBO3_MULT9_CORE_MULT9_L0 | → | N1:JBRL3_MULT18_CORE_MULT18_0 |
| N1:JBO4_MULT9_CORE_MULT9_L0 | → | N1:JBRL4_MULT18_CORE_MULT18_0 |
| N1:JBO5_MULT9_CORE_MULT9_L0 | → | N1:JBRL5_MULT18_CORE_MULT18_0 |
| N1:JBO6_MULT9_CORE_MULT9_L0 | → | N1:JBRL6_MULT18_CORE_MULT18_0 |
| N1:JBO7_MULT9_CORE_MULT9_L0 | → | N1:JBRL7_MULT18_CORE_MULT18_0 |
| N1:JBO8_MULT9_CORE_MULT9_L0 | → | N1:JBRL8_MULT18_CORE_MULT18_0 |
| N1:JBRSO0_PREADD9_CORE_PREADD9_L0 | → | N1:JBRS10_PREADD9_CORE_PREADD9_H0 |
| N1W7:JBRSO0_PREADD9_CORE_PREADD9_H3 | → | N1:JBRS10_PREADD9_CORE_PREADD9_L0 |
| N1:JBRSO1_PREADD9_CORE_PREADD9_L0 | → | N1:JBRS11_PREADD9_CORE_PREADD9_H0 |
| N1W7:JBRSO1_PREADD9_CORE_PREADD9_H3 | → | N1:JBRS11_PREADD9_CORE_PREADD9_L0 |
| N1:JBRSO2_PREADD9_CORE_PREADD9_L0 | → | N1:JBRS12_PREADD9_CORE_PREADD9_H0 |
| N1W7:JBRSO2_PREADD9_CORE_PREADD9_H3 | → | N1:JBRS12_PREADD9_CORE_PREADD9_L0 |
| N1:JBRSO3_PREADD9_CORE_PREADD9_L0 | → | N1:JBRS13_PREADD9_CORE_PREADD9_H0 |
| N1W7:JBRSO3_PREADD9_CORE_PREADD9_H3 | → | N1:JBRS13_PREADD9_CORE_PREADD9_L0 |
| N1:JBRSO4_PREADD9_CORE_PREADD9_L0 | → | N1:JBRS14_PREADD9_CORE_PREADD9_H0 |
| N1W7:JBRSO4_PREADD9_CORE_PREADD9_H3 | → | N1:JBRS14_PREADD9_CORE_PREADD9_L0 |
| N1:JBRSO5_PREADD9_CORE_PREADD9_L0 | → | N1:JBRS15_PREADD9_CORE_PREADD9_H0 |
| N1W7:JBRSO5_PREADD9_CORE_PREADD9_H3 | → | N1:JBRS15_PREADD9_CORE_PREADD9_L0 |
| N1:JBRSO6_PREADD9_CORE_PREADD9_L0 | → | N1:JBRS16_PREADD9_CORE_PREADD9_H0 |
| N1W7:JBRSO6_PREADD9_CORE_PREADD9_H3 | → | N1:JBRS16_PREADD9_CORE_PREADD9_L0 |
| N1:JBRSO7_PREADD9_CORE_PREADD9_L0 | → | N1:JBRS17_PREADD9_CORE_PREADD9_H0 |
| N1W7:JBRSO7_PREADD9_CORE_PREADD9_H3 | → | N1:JBRS17_PREADD9_CORE_PREADD9_L0 |
| N1:JBRSO8_PREADD9_CORE_PREADD9_L0 | → | N1:JBRS18_PREADD9_CORE_PREADD9_H0 |
| N1W7:JBRSO8_PREADD9_CORE_PREADD9_H3 | → | N1:JBRS18_PREADD9_CORE_PREADD9_L0 |
| N1W7:JBRSO0_PREADD9_CORE_PREADD9_H3 | → | N1:JBRS20_PREADD9_CORE_PREADD9_H0 |
| N1W7:JBRSO0_PREADD9_CORE_PREADD9_L3 | → | N1:JBRS20_PREADD9_CORE_PREADD9_L0 |
| N1W7:JBRSO1_PREADD9_CORE_PREADD9_H3 | → | N1:JBRS21_PREADD9_CORE_PREADD9_H0 |
| N1W7:JBRSO1_PREADD9_CORE_PREADD9_L3 | → | N1:JBRS21_PREADD9_CORE_PREADD9_L0 |
| N1W7:JBRSO2_PREADD9_CORE_PREADD9_H3 | → | N1:JBRS22_PREADD9_CORE_PREADD9_H0 |
| N1W7:JBRSO2_PREADD9_CORE_PREADD9_L3 | → | N1:JBRS22_PREADD9_CORE_PREADD9_L0 |
| N1W7:JBRSO3_PREADD9_CORE_PREADD9_H3 | → | N1:JBRS23_PREADD9_CORE_PREADD9_H0 |
| N1W7:JBRSO3_PREADD9_CORE_PREADD9_L3 | → | N1:JBRS23_PREADD9_CORE_PREADD9_L0 |
| N1W7:JBRSO4_PREADD9_CORE_PREADD9_H3 | → | N1:JBRS24_PREADD9_CORE_PREADD9_H0 |
| N1W7:JBRSO4_PREADD9_CORE_PREADD9_L3 | → | N1:JBRS24_PREADD9_CORE_PREADD9_L0 |
| N1W7:JBRSO5_PREADD9_CORE_PREADD9_H3 | → | N1:JBRS25_PREADD9_CORE_PREADD9_H0 |
| N1W7:JBRSO5_PREADD9_CORE_PREADD9_L3 | → | N1:JBRS25_PREADD9_CORE_PREADD9_L0 |
| N1W7:JBRSO6_PREADD9_CORE_PREADD9_H3 | → | N1:JBRS26_PREADD9_CORE_PREADD9_H0 |
| N1W7:JBRSO6_PREADD9_CORE_PREADD9_L3 | → | N1:JBRS26_PREADD9_CORE_PREADD9_L0 |
| N1W7:JBRSO7_PREADD9_CORE_PREADD9_H3 | → | N1:JBRS27_PREADD9_CORE_PREADD9_H0 |
| N1W7:JBRSO7_PREADD9_CORE_PREADD9_L3 | → | N1:JBRS27_PREADD9_CORE_PREADD9_L0 |
| N1W7:JBRSO8_PREADD9_CORE_PREADD9_H3 | → | N1:JBRS28_PREADD9_CORE_PREADD9_H0 |
| N1W7:JBRSO8_PREADD9_CORE_PREADD9_L3 | → | N1:JBRS28_PREADD9_CORE_PREADD9_L0 |
| N1:JBRSIGNED_PREADD9_CORE_PREADD9_H0 | → | N1:JBRSIGNED_MULT9_CORE_MULT9_H0 |
| N1:JBRSIGNED_PREADD9_CORE_PREADD9_L0 | → | N1:JBRSIGNED_MULT9_CORE_MULT9_L0 |
| N1:JBRSOSGND_PREADD9_CORE_PREADD9_L0 | → | N1:JBRSS1_PREADD9_CORE_PREADD9_H0 |
| N1W7:JBRSOSGND_PREADD9_CORE_PREADD9_H3 | → | N1:JBRSS1_PREADD9_CORE_PREADD9_L0 |
| N1W7:JBRSOSGND_PREADD9_CORE_PREADD9_H3 | → | N1:JBRSS2_PREADD9_CORE_PREADD9_H0 |
| N1W7:JBRSOSGND_PREADD9_CORE_PREADD9_L3 | → | N1:JBRSS2_PREADD9_CORE_PREADD9_L0 |
| N1E3:JCIBMUXOUTD5 | → | N1:JBSIGNED_PREADD9_CORE_PREADD9_H0 |
| N1E3:JCIBMUXOUTD4 | → | N1:JBSIGNED_PREADD9_CORE_PREADD9_L0 |
| N1E1:JCIBMUXOUTC2 | → | N1:JC0_PREADD9_CORE_PREADD9_H0 |
| N1:JCIBMUXOUTC0 | → | N1:JC0_PREADD9_CORE_PREADD9_L0 |
| N1E1:JCIBMUXOUTC3 | → | N1:JC1_PREADD9_CORE_PREADD9_H0 |
| N1:JCIBMUXOUTC1 | → | N1:JC1_PREADD9_CORE_PREADD9_L0 |
| N1E1:JCIBMUXOUTC4 | → | N1:JC2_PREADD9_CORE_PREADD9_H0 |
| N1:JCIBMUXOUTC2 | → | N1:JC2_PREADD9_CORE_PREADD9_L0 |
| N1E1:JCIBMUXOUTC5 | → | N1:JC3_PREADD9_CORE_PREADD9_H0 |
| N1:JCIBMUXOUTC3 | → | N1:JC3_PREADD9_CORE_PREADD9_L0 |
| N1E1:JCIBMUXOUTC6 | → | N1:JC4_PREADD9_CORE_PREADD9_H0 |
| N1:JCIBMUXOUTC4 | → | N1:JC4_PREADD9_CORE_PREADD9_L0 |
| N1E1:JCIBMUXOUTC7 | → | N1:JC5_PREADD9_CORE_PREADD9_H0 |
| N1:JCIBMUXOUTC5 | → | N1:JC5_PREADD9_CORE_PREADD9_L0 |
| N1E2:JCIBMUXOUTC0 | → | N1:JC6_PREADD9_CORE_PREADD9_H0 |
| N1:JCIBMUXOUTC6 | → | N1:JC6_PREADD9_CORE_PREADD9_L0 |
| N1E2:JCIBMUXOUTC1 | → | N1:JC7_PREADD9_CORE_PREADD9_H0 |
| N1:JCIBMUXOUTC7 | → | N1:JC7_PREADD9_CORE_PREADD9_L0 |
| N1E2:JCIBMUXOUTC2 | → | N1:JC8_PREADD9_CORE_PREADD9_H0 |
| N1E1:JCIBMUXOUTC0 | → | N1:JC8_PREADD9_CORE_PREADD9_L0 |
| N1E2:JCIBMUXOUTC3 | → | N1:JC9_PREADD9_CORE_PREADD9_H0 |
| N1E1:JCIBMUXOUTC1 | → | N1:JC9_PREADD9_CORE_PREADD9_L0 |
| N1W1:JCE0 | → | N1:JCEA_MULT9_CORE_MULT9_H0 |
| N1W1:JCE0 | → | N1:JCEA_MULT9_CORE_MULT9_L0 |
| N1W1:JCE1 | → | N1:JCEB_PREADD9_CORE_PREADD9_H0 |
| N1W1:JCE1 | → | N1:JCEB_PREADD9_CORE_PREADD9_L0 |
| N1:JCE0 | → | N1:JCECL_PREADD9_CORE_PREADD9_H0 |
| N1:JCE0 | → | N1:JCECL_PREADD9_CORE_PREADD9_L0 |
| N1E5:JCE0 | → | N1:JCEP_MULT9_CORE_MULT9_H0 |
| N1E5:JCE0 | → | N1:JCEP_MULT9_CORE_MULT9_L0 |
| N1E1:JCLK0 | → | N1:JCLK_MULT9_CORE_MULT9_H0 |
| N1E1:JCLK0 | → | N1:JCLK_MULT9_CORE_MULT9_L0 |
| N1E1:JCLK0 | → | N1:JCLK_PREADD9_CORE_PREADD9_H0 |
| N1E1:JCLK0 | → | N1:JCLK_PREADD9_CORE_PREADD9_L0 |
| N1:JPL180_MULT18_CORE_MULT18_0 | → | N1:JP360_MULT18_CORE_MULT18_0 |
| N1:JPL1810_MULT18_CORE_MULT18_0 | → | N1:JP3610_MULT18_CORE_MULT18_0 |
| N1:JPL1811_MULT18_CORE_MULT18_0 | → | N1:JP3611_MULT18_CORE_MULT18_0 |
| N1:JPL1812_MULT18_CORE_MULT18_0 | → | N1:JP3612_MULT18_CORE_MULT18_0 |
| N1:JPL1813_MULT18_CORE_MULT18_0 | → | N1:JP3613_MULT18_CORE_MULT18_0 |
| N1:JPL1814_MULT18_CORE_MULT18_0 | → | N1:JP3614_MULT18_CORE_MULT18_0 |
| N1:JPL1815_MULT18_CORE_MULT18_0 | → | N1:JP3615_MULT18_CORE_MULT18_0 |
| N1:JPL1816_MULT18_CORE_MULT18_0 | → | N1:JP3616_MULT18_CORE_MULT18_0 |
| N1:JPL1817_MULT18_CORE_MULT18_0 | → | N1:JP3617_MULT18_CORE_MULT18_0 |
| N1:JPH180_MULT18_CORE_MULT18_0 | → | N1:JP3618_MULT18_CORE_MULT18_0 |
| N1:JPH181_MULT18_CORE_MULT18_0 | → | N1:JP3619_MULT18_CORE_MULT18_0 |
| N1:JPL181_MULT18_CORE_MULT18_0 | → | N1:JP361_MULT18_CORE_MULT18_0 |
| N1:JPH182_MULT18_CORE_MULT18_0 | → | N1:JP3620_MULT18_CORE_MULT18_0 |
| N1:JPH183_MULT18_CORE_MULT18_0 | → | N1:JP3621_MULT18_CORE_MULT18_0 |
| N1:JPH184_MULT18_CORE_MULT18_0 | → | N1:JP3622_MULT18_CORE_MULT18_0 |
| N1:JPH185_MULT18_CORE_MULT18_0 | → | N1:JP3623_MULT18_CORE_MULT18_0 |
| N1:JPH186_MULT18_CORE_MULT18_0 | → | N1:JP3624_MULT18_CORE_MULT18_0 |
| N1:JPH187_MULT18_CORE_MULT18_0 | → | N1:JP3625_MULT18_CORE_MULT18_0 |
| N1:JPH188_MULT18_CORE_MULT18_0 | → | N1:JP3626_MULT18_CORE_MULT18_0 |
| N1:JPH189_MULT18_CORE_MULT18_0 | → | N1:JP3627_MULT18_CORE_MULT18_0 |
| N1:JPH1810_MULT18_CORE_MULT18_0 | → | N1:JP3628_MULT18_CORE_MULT18_0 |
| N1:JPH1811_MULT18_CORE_MULT18_0 | → | N1:JP3629_MULT18_CORE_MULT18_0 |
| N1:JPL182_MULT18_CORE_MULT18_0 | → | N1:JP362_MULT18_CORE_MULT18_0 |
| N1:JPH1812_MULT18_CORE_MULT18_0 | → | N1:JP3630_MULT18_CORE_MULT18_0 |
| N1:JPH1813_MULT18_CORE_MULT18_0 | → | N1:JP3631_MULT18_CORE_MULT18_0 |
| N1:JPH1814_MULT18_CORE_MULT18_0 | → | N1:JP3632_MULT18_CORE_MULT18_0 |
| N1:JPH1815_MULT18_CORE_MULT18_0 | → | N1:JP3633_MULT18_CORE_MULT18_0 |
| N1:JPH1816_MULT18_CORE_MULT18_0 | → | N1:JP3634_MULT18_CORE_MULT18_0 |
| N1:JPH1817_MULT18_CORE_MULT18_0 | → | N1:JP3635_MULT18_CORE_MULT18_0 |
| N1:JPL183_MULT18_CORE_MULT18_0 | → | N1:JP363_MULT18_CORE_MULT18_0 |
| N1:JPL184_MULT18_CORE_MULT18_0 | → | N1:JP364_MULT18_CORE_MULT18_0 |
| N1:JPL185_MULT18_CORE_MULT18_0 | → | N1:JP365_MULT18_CORE_MULT18_0 |
| N1:JPL186_MULT18_CORE_MULT18_0 | → | N1:JP366_MULT18_CORE_MULT18_0 |
| N1:JPL187_MULT18_CORE_MULT18_0 | → | N1:JP367_MULT18_CORE_MULT18_0 |
| N1:JPL188_MULT18_CORE_MULT18_0 | → | N1:JP368_MULT18_CORE_MULT18_0 |
| N1:JPL189_MULT18_CORE_MULT18_0 | → | N1:JP369_MULT18_CORE_MULT18_0 |
| N1:JP180_MULT9_CORE_MULT9_H0 | → | N1:JPH180_MULT18_CORE_MULT18_0 |
| N1:JP1810_MULT9_CORE_MULT9_H0 | → | N1:JPH1810_MULT18_CORE_MULT18_0 |
| N1:JP1811_MULT9_CORE_MULT9_H0 | → | N1:JPH1811_MULT18_CORE_MULT18_0 |
| N1:JP1812_MULT9_CORE_MULT9_H0 | → | N1:JPH1812_MULT18_CORE_MULT18_0 |
| N1:JP1813_MULT9_CORE_MULT9_H0 | → | N1:JPH1813_MULT18_CORE_MULT18_0 |
| N1:JP1814_MULT9_CORE_MULT9_H0 | → | N1:JPH1814_MULT18_CORE_MULT18_0 |
| N1:JP1815_MULT9_CORE_MULT9_H0 | → | N1:JPH1815_MULT18_CORE_MULT18_0 |
| N1:JP1816_MULT9_CORE_MULT9_H0 | → | N1:JPH1816_MULT18_CORE_MULT18_0 |
| N1:JP1817_MULT9_CORE_MULT9_H0 | → | N1:JPH1817_MULT18_CORE_MULT18_0 |
| N1:JP1818_MULT9_CORE_MULT9_H0 | → | N1:JPH1818_MULT18_CORE_MULT18_0 |
| N1:JP1819_MULT9_CORE_MULT9_H0 | → | N1:JPH1819_MULT18_CORE_MULT18_0 |
| N1:JP181_MULT9_CORE_MULT9_H0 | → | N1:JPH181_MULT18_CORE_MULT18_0 |
| N1:JP182_MULT9_CORE_MULT9_H0 | → | N1:JPH182_MULT18_CORE_MULT18_0 |
| N1:JP183_MULT9_CORE_MULT9_H0 | → | N1:JPH183_MULT18_CORE_MULT18_0 |
| N1:JP184_MULT9_CORE_MULT9_H0 | → | N1:JPH184_MULT18_CORE_MULT18_0 |
| N1:JP185_MULT9_CORE_MULT9_H0 | → | N1:JPH185_MULT18_CORE_MULT18_0 |
| N1:JP186_MULT9_CORE_MULT9_H0 | → | N1:JPH186_MULT18_CORE_MULT18_0 |
| N1:JP187_MULT9_CORE_MULT9_H0 | → | N1:JPH187_MULT18_CORE_MULT18_0 |
| N1:JP188_MULT9_CORE_MULT9_H0 | → | N1:JPH188_MULT18_CORE_MULT18_0 |
| N1:JP189_MULT9_CORE_MULT9_H0 | → | N1:JPH189_MULT18_CORE_MULT18_0 |
| N1:JP180_MULT9_CORE_MULT9_L0 | → | N1:JPL180_MULT18_CORE_MULT18_0 |
| N1:JP1810_MULT9_CORE_MULT9_L0 | → | N1:JPL1810_MULT18_CORE_MULT18_0 |
| N1:JP1811_MULT9_CORE_MULT9_L0 | → | N1:JPL1811_MULT18_CORE_MULT18_0 |
| N1:JP1812_MULT9_CORE_MULT9_L0 | → | N1:JPL1812_MULT18_CORE_MULT18_0 |
| N1:JP1813_MULT9_CORE_MULT9_L0 | → | N1:JPL1813_MULT18_CORE_MULT18_0 |
| N1:JP1814_MULT9_CORE_MULT9_L0 | → | N1:JPL1814_MULT18_CORE_MULT18_0 |
| N1:JP1815_MULT9_CORE_MULT9_L0 | → | N1:JPL1815_MULT18_CORE_MULT18_0 |
| N1:JP1816_MULT9_CORE_MULT9_L0 | → | N1:JPL1816_MULT18_CORE_MULT18_0 |
| N1:JP1817_MULT9_CORE_MULT9_L0 | → | N1:JPL1817_MULT18_CORE_MULT18_0 |
| N1:JP1818_MULT9_CORE_MULT9_L0 | → | N1:JPL1818_MULT18_CORE_MULT18_0 |
| N1:JP1819_MULT9_CORE_MULT9_L0 | → | N1:JPL1819_MULT18_CORE_MULT18_0 |
| N1:JP181_MULT9_CORE_MULT9_L0 | → | N1:JPL181_MULT18_CORE_MULT18_0 |
| N1:JP182_MULT9_CORE_MULT9_L0 | → | N1:JPL182_MULT18_CORE_MULT18_0 |
| N1:JP183_MULT9_CORE_MULT9_L0 | → | N1:JPL183_MULT18_CORE_MULT18_0 |
| N1:JP184_MULT9_CORE_MULT9_L0 | → | N1:JPL184_MULT18_CORE_MULT18_0 |
| N1:JP185_MULT9_CORE_MULT9_L0 | → | N1:JPL185_MULT18_CORE_MULT18_0 |
| N1:JP186_MULT9_CORE_MULT9_L0 | → | N1:JPL186_MULT18_CORE_MULT18_0 |
| N1:JP187_MULT9_CORE_MULT9_L0 | → | N1:JPL187_MULT18_CORE_MULT18_0 |
| N1:JP188_MULT9_CORE_MULT9_L0 | → | N1:JPL188_MULT18_CORE_MULT18_0 |
| N1:JP189_MULT9_CORE_MULT9_L0 | → | N1:JPL189_MULT18_CORE_MULT18_0 |
| N1:JPRCASOUT_PREADD9_CORE_PREADD9_L0 | → | N1:JPRCASIN_PREADD9_CORE_PREADD9_H0 |
| N1W7:JPRCASOUT_PREADD9_CORE_PREADD9_H3 | → | N1:JPRCASIN_PREADD9_CORE_PREADD9_L0 |
| N1E5:JCIBMUXOUTB2 | → | N1:JROUNDEN_MULT18_CORE_MULT18_0 |
| N1W1:JLSR0 | → | N1:JRSTA_MULT9_CORE_MULT9_H0 |
| N1W1:JLSR0 | → | N1:JRSTA_MULT9_CORE_MULT9_L0 |
| N1W1:JLSR1 | → | N1:JRSTB_PREADD9_CORE_PREADD9_H0 |
| N1W1:JLSR1 | → | N1:JRSTB_PREADD9_CORE_PREADD9_L0 |
| N1:JLSR0 | → | N1:JRSTCL_PREADD9_CORE_PREADD9_H0 |
| N1:JLSR0 | → | N1:JRSTCL_PREADD9_CORE_PREADD9_L0 |
| N1E5:JLSR0 | → | N1:JRSTP_MULT9_CORE_MULT9_H0 |
| N1E5:JLSR0 | → | N1:JRSTP_MULT9_CORE_MULT9_L0 |
| N1E4:JCIBMUXOUTD0 | → | N1:JSFTCTRL0_MULT18_CORE_MULT18_0 |
| N1E4:JCIBMUXOUTD1 | → | N1:JSFTCTRL1_MULT18_CORE_MULT18_0 |
| N1E4:JCIBMUXOUTD2 | → | N1:JSFTCTRL2_MULT18_CORE_MULT18_0 |
| N1E4:JCIBMUXOUTD3 | → | N1:JSFTCTRL3_MULT18_CORE_MULT18_0 |
| N1:JAR0_MULT9_CORE_MULT9_H0 | → | N1E1:JAS10_MULT9_CORE_MULT9_L1 |
| N1:JAR1_MULT9_CORE_MULT9_H0 | → | N1E1:JAS11_MULT9_CORE_MULT9_L1 |
| N1:JAR2_MULT9_CORE_MULT9_H0 | → | N1E1:JAS12_MULT9_CORE_MULT9_L1 |
| N1:JAR3_MULT9_CORE_MULT9_H0 | → | N1E1:JAS13_MULT9_CORE_MULT9_L1 |
| N1:JAR4_MULT9_CORE_MULT9_H0 | → | N1E1:JAS14_MULT9_CORE_MULT9_L1 |
| N1:JAR5_MULT9_CORE_MULT9_H0 | → | N1E1:JAS15_MULT9_CORE_MULT9_L1 |
| N1:JAR6_MULT9_CORE_MULT9_H0 | → | N1E1:JAS16_MULT9_CORE_MULT9_L1 |
| N1:JAR7_MULT9_CORE_MULT9_H0 | → | N1E1:JAS17_MULT9_CORE_MULT9_L1 |
| N1:JAR8_MULT9_CORE_MULT9_H0 | → | N1E1:JAS18_MULT9_CORE_MULT9_L1 |
| N1:JAR0_MULT9_CORE_MULT9_H0 | → | N1E1:JAS20_MULT9_CORE_MULT9_H1 |
| N1:JAR0_MULT9_CORE_MULT9_L0 | → | N1E1:JAS20_MULT9_CORE_MULT9_L1 |
| N1:JAR1_MULT9_CORE_MULT9_H0 | → | N1E1:JAS21_MULT9_CORE_MULT9_H1 |
| N1:JAR1_MULT9_CORE_MULT9_L0 | → | N1E1:JAS21_MULT9_CORE_MULT9_L1 |
| N1:JAR2_MULT9_CORE_MULT9_H0 | → | N1E1:JAS22_MULT9_CORE_MULT9_H1 |
| N1:JAR2_MULT9_CORE_MULT9_L0 | → | N1E1:JAS22_MULT9_CORE_MULT9_L1 |
| N1:JAR3_MULT9_CORE_MULT9_H0 | → | N1E1:JAS23_MULT9_CORE_MULT9_H1 |
| N1:JAR3_MULT9_CORE_MULT9_L0 | → | N1E1:JAS23_MULT9_CORE_MULT9_L1 |
| N1:JAR4_MULT9_CORE_MULT9_H0 | → | N1E1:JAS24_MULT9_CORE_MULT9_H1 |
| N1:JAR4_MULT9_CORE_MULT9_L0 | → | N1E1:JAS24_MULT9_CORE_MULT9_L1 |
| N1:JAR5_MULT9_CORE_MULT9_H0 | → | N1E1:JAS25_MULT9_CORE_MULT9_H1 |
| N1:JAR5_MULT9_CORE_MULT9_L0 | → | N1E1:JAS25_MULT9_CORE_MULT9_L1 |
| N1:JAR6_MULT9_CORE_MULT9_H0 | → | N1E1:JAS26_MULT9_CORE_MULT9_H1 |
| N1:JAR6_MULT9_CORE_MULT9_L0 | → | N1E1:JAS26_MULT9_CORE_MULT9_L1 |
| N1:JAR7_MULT9_CORE_MULT9_H0 | → | N1E1:JAS27_MULT9_CORE_MULT9_H1 |
| N1:JAR7_MULT9_CORE_MULT9_L0 | → | N1E1:JAS27_MULT9_CORE_MULT9_L1 |
| N1:JAR8_MULT9_CORE_MULT9_H0 | → | N1E1:JAS28_MULT9_CORE_MULT9_H1 |
| N1:JAR8_MULT9_CORE_MULT9_L0 | → | N1E1:JAS28_MULT9_CORE_MULT9_L1 |
| N1:JARSIGNED_MULT9_CORE_MULT9_H0 | → | N1E1:JASSIGNED1_MULT9_CORE_MULT9_L1 |
| N1:JARSIGNED_MULT9_CORE_MULT9_H0 | → | N1E1:JASSIGNED2_MULT9_CORE_MULT9_H1 |
| N1:JARSIGNED_MULT9_CORE_MULT9_L0 | → | N1E1:JASSIGNED2_MULT9_CORE_MULT9_L1 |
| N1:JBRSO0_PREADD9_CORE_PREADD9_H0 | → | N1E1:JBRS10_PREADD9_CORE_PREADD9_L1 |
| N1:JBRSO1_PREADD9_CORE_PREADD9_H0 | → | N1E1:JBRS11_PREADD9_CORE_PREADD9_L1 |
| N1:JBRSO2_PREADD9_CORE_PREADD9_H0 | → | N1E1:JBRS12_PREADD9_CORE_PREADD9_L1 |
| N1:JBRSO3_PREADD9_CORE_PREADD9_H0 | → | N1E1:JBRS13_PREADD9_CORE_PREADD9_L1 |
| N1:JBRSO4_PREADD9_CORE_PREADD9_H0 | → | N1E1:JBRS14_PREADD9_CORE_PREADD9_L1 |
| N1:JBRSO5_PREADD9_CORE_PREADD9_H0 | → | N1E1:JBRS15_PREADD9_CORE_PREADD9_L1 |
| N1:JBRSO6_PREADD9_CORE_PREADD9_H0 | → | N1E1:JBRS16_PREADD9_CORE_PREADD9_L1 |
| N1:JBRSO7_PREADD9_CORE_PREADD9_H0 | → | N1E1:JBRS17_PREADD9_CORE_PREADD9_L1 |
| N1:JBRSO8_PREADD9_CORE_PREADD9_H0 | → | N1E1:JBRS18_PREADD9_CORE_PREADD9_L1 |
| N1:JBRSO0_PREADD9_CORE_PREADD9_H0 | → | N1E1:JBRS20_PREADD9_CORE_PREADD9_H1 |
| N1:JBRSO0_PREADD9_CORE_PREADD9_L0 | → | N1E1:JBRS20_PREADD9_CORE_PREADD9_L1 |
| N1:JBRSO1_PREADD9_CORE_PREADD9_H0 | → | N1E1:JBRS21_PREADD9_CORE_PREADD9_H1 |
| N1:JBRSO1_PREADD9_CORE_PREADD9_L0 | → | N1E1:JBRS21_PREADD9_CORE_PREADD9_L1 |
| N1:JBRSO2_PREADD9_CORE_PREADD9_H0 | → | N1E1:JBRS22_PREADD9_CORE_PREADD9_H1 |
| N1:JBRSO2_PREADD9_CORE_PREADD9_L0 | → | N1E1:JBRS22_PREADD9_CORE_PREADD9_L1 |
| N1:JBRSO3_PREADD9_CORE_PREADD9_H0 | → | N1E1:JBRS23_PREADD9_CORE_PREADD9_H1 |
| N1:JBRSO3_PREADD9_CORE_PREADD9_L0 | → | N1E1:JBRS23_PREADD9_CORE_PREADD9_L1 |
| N1:JBRSO4_PREADD9_CORE_PREADD9_H0 | → | N1E1:JBRS24_PREADD9_CORE_PREADD9_H1 |
| N1:JBRSO4_PREADD9_CORE_PREADD9_L0 | → | N1E1:JBRS24_PREADD9_CORE_PREADD9_L1 |
| N1:JBRSO5_PREADD9_CORE_PREADD9_H0 | → | N1E1:JBRS25_PREADD9_CORE_PREADD9_H1 |
| N1:JBRSO5_PREADD9_CORE_PREADD9_L0 | → | N1E1:JBRS25_PREADD9_CORE_PREADD9_L1 |
| N1:JBRSO6_PREADD9_CORE_PREADD9_H0 | → | N1E1:JBRS26_PREADD9_CORE_PREADD9_H1 |
| N1:JBRSO6_PREADD9_CORE_PREADD9_L0 | → | N1E1:JBRS26_PREADD9_CORE_PREADD9_L1 |
| N1:JBRSO7_PREADD9_CORE_PREADD9_H0 | → | N1E1:JBRS27_PREADD9_CORE_PREADD9_H1 |
| N1:JBRSO7_PREADD9_CORE_PREADD9_L0 | → | N1E1:JBRS27_PREADD9_CORE_PREADD9_L1 |
| N1:JBRSO8_PREADD9_CORE_PREADD9_H0 | → | N1E1:JBRS28_PREADD9_CORE_PREADD9_H1 |
| N1:JBRSO8_PREADD9_CORE_PREADD9_L0 | → | N1E1:JBRS28_PREADD9_CORE_PREADD9_L1 |
| N1:JBRSOSGND_PREADD9_CORE_PREADD9_H0 | → | N1E1:JBRSS1_PREADD9_CORE_PREADD9_L1 |
| N1:JBRSOSGND_PREADD9_CORE_PREADD9_H0 | → | N1E1:JBRSS2_PREADD9_CORE_PREADD9_H1 |
| N1:JBRSOSGND_PREADD9_CORE_PREADD9_L0 | → | N1E1:JBRSS2_PREADD9_CORE_PREADD9_L1 |
| N1:JPRCASOUT_PREADD9_CORE_PREADD9_H0 | → | N1E1:JPRCASIN_PREADD9_CORE_PREADD9_L1 |
| N1:JP360_MULT18_CORE_MULT18_0 | → | N1E2:JPL360_MULT18X36_CORE_MULT18X36_0 |
| N1:JP3610_MULT18_CORE_MULT18_0 | → | N1E2:JPL3610_MULT18X36_CORE_MULT18X36_0 |
| N1:JP3611_MULT18_CORE_MULT18_0 | → | N1E2:JPL3611_MULT18X36_CORE_MULT18X36_0 |
| N1:JP3612_MULT18_CORE_MULT18_0 | → | N1E2:JPL3612_MULT18X36_CORE_MULT18X36_0 |
| N1:JP3613_MULT18_CORE_MULT18_0 | → | N1E2:JPL3613_MULT18X36_CORE_MULT18X36_0 |
| N1:JP3614_MULT18_CORE_MULT18_0 | → | N1E2:JPL3614_MULT18X36_CORE_MULT18X36_0 |
| N1:JP3615_MULT18_CORE_MULT18_0 | → | N1E2:JPL3615_MULT18X36_CORE_MULT18X36_0 |
| N1:JP3616_MULT18_CORE_MULT18_0 | → | N1E2:JPL3616_MULT18X36_CORE_MULT18X36_0 |
| N1:JP3617_MULT18_CORE_MULT18_0 | → | N1E2:JPL3617_MULT18X36_CORE_MULT18X36_0 |
| N1:JP3618_MULT18_CORE_MULT18_0 | → | N1E2:JPL3618_MULT18X36_CORE_MULT18X36_0 |
| N1:JP3619_MULT18_CORE_MULT18_0 | → | N1E2:JPL3619_MULT18X36_CORE_MULT18X36_0 |
| N1:JP361_MULT18_CORE_MULT18_0 | → | N1E2:JPL361_MULT18X36_CORE_MULT18X36_0 |
| N1:JP3620_MULT18_CORE_MULT18_0 | → | N1E2:JPL3620_MULT18X36_CORE_MULT18X36_0 |
| N1:JP3621_MULT18_CORE_MULT18_0 | → | N1E2:JPL3621_MULT18X36_CORE_MULT18X36_0 |
| N1:JP3622_MULT18_CORE_MULT18_0 | → | N1E2:JPL3622_MULT18X36_CORE_MULT18X36_0 |
| N1:JP3623_MULT18_CORE_MULT18_0 | → | N1E2:JPL3623_MULT18X36_CORE_MULT18X36_0 |
| N1:JP3624_MULT18_CORE_MULT18_0 | → | N1E2:JPL3624_MULT18X36_CORE_MULT18X36_0 |
| N1:JP3625_MULT18_CORE_MULT18_0 | → | N1E2:JPL3625_MULT18X36_CORE_MULT18X36_0 |
| N1:JP3626_MULT18_CORE_MULT18_0 | → | N1E2:JPL3626_MULT18X36_CORE_MULT18X36_0 |
| N1:JP3627_MULT18_CORE_MULT18_0 | → | N1E2:JPL3627_MULT18X36_CORE_MULT18X36_0 |
| N1:JP3628_MULT18_CORE_MULT18_0 | → | N1E2:JPL3628_MULT18X36_CORE_MULT18X36_0 |
| N1:JP3629_MULT18_CORE_MULT18_0 | → | N1E2:JPL3629_MULT18X36_CORE_MULT18X36_0 |
| N1:JP362_MULT18_CORE_MULT18_0 | → | N1E2:JPL362_MULT18X36_CORE_MULT18X36_0 |
| N1:JP3630_MULT18_CORE_MULT18_0 | → | N1E2:JPL3630_MULT18X36_CORE_MULT18X36_0 |
| N1:JP3631_MULT18_CORE_MULT18_0 | → | N1E2:JPL3631_MULT18X36_CORE_MULT18X36_0 |
| N1:JP3632_MULT18_CORE_MULT18_0 | → | N1E2:JPL3632_MULT18X36_CORE_MULT18X36_0 |
| N1:JP3633_MULT18_CORE_MULT18_0 | → | N1E2:JPL3633_MULT18X36_CORE_MULT18X36_0 |
| N1:JP3634_MULT18_CORE_MULT18_0 | → | N1E2:JPL3634_MULT18X36_CORE_MULT18X36_0 |
| N1:JP3635_MULT18_CORE_MULT18_0 | → | N1E2:JPL3635_MULT18X36_CORE_MULT18X36_0 |
| N1:JP3636_MULT18_CORE_MULT18_0 | → | N1E2:JPL3636_MULT18X36_CORE_MULT18X36_0 |
| N1:JP3637_MULT18_CORE_MULT18_0 | → | N1E2:JPL3637_MULT18X36_CORE_MULT18X36_0 |
| N1:JP363_MULT18_CORE_MULT18_0 | → | N1E2:JPL363_MULT18X36_CORE_MULT18X36_0 |
| N1:JP364_MULT18_CORE_MULT18_0 | → | N1E2:JPL364_MULT18X36_CORE_MULT18X36_0 |
| N1:JP365_MULT18_CORE_MULT18_0 | → | N1E2:JPL365_MULT18X36_CORE_MULT18X36_0 |
| N1:JP366_MULT18_CORE_MULT18_0 | → | N1E2:JPL366_MULT18X36_CORE_MULT18X36_0 |
| N1:JP367_MULT18_CORE_MULT18_0 | → | N1E2:JPL367_MULT18X36_CORE_MULT18X36_0 |
| N1:JP368_MULT18_CORE_MULT18_0 | → | N1E2:JPL368_MULT18X36_CORE_MULT18X36_0 |
| N1:JP369_MULT18_CORE_MULT18_0 | → | N1E2:JPL369_MULT18X36_CORE_MULT18X36_0 |
| N1:JSIGNED18_MULT18_CORE_MULT18_0 | → | N1E2:JSGNED18L_MULT18X36_CORE_MULT18X36_0 |
| N1:JBLSO0_PREADD9_CORE_PREADD9_L0 | → | N1W7:JBLS10_PREADD9_CORE_PREADD9_H3 |
| N1:JBLSO1_PREADD9_CORE_PREADD9_L0 | → | N1W7:JBLS11_PREADD9_CORE_PREADD9_H3 |
| N1:JBLSO2_PREADD9_CORE_PREADD9_L0 | → | N1W7:JBLS12_PREADD9_CORE_PREADD9_H3 |
| N1:JBLSO3_PREADD9_CORE_PREADD9_L0 | → | N1W7:JBLS13_PREADD9_CORE_PREADD9_H3 |
| N1:JBLSO4_PREADD9_CORE_PREADD9_L0 | → | N1W7:JBLS14_PREADD9_CORE_PREADD9_H3 |
| N1:JBLSO5_PREADD9_CORE_PREADD9_L0 | → | N1W7:JBLS15_PREADD9_CORE_PREADD9_H3 |
| N1:JBLSO6_PREADD9_CORE_PREADD9_L0 | → | N1W7:JBLS16_PREADD9_CORE_PREADD9_H3 |
| N1:JBLSO7_PREADD9_CORE_PREADD9_L0 | → | N1W7:JBLS17_PREADD9_CORE_PREADD9_H3 |
| N1:JBLSO8_PREADD9_CORE_PREADD9_L0 | → | N1W7:JBLS18_PREADD9_CORE_PREADD9_H3 |
| N1:JBLSO0_PREADD9_CORE_PREADD9_H0 | → | N1W7:JBLS20_PREADD9_CORE_PREADD9_H3 |
| N1:JBLSO0_PREADD9_CORE_PREADD9_L0 | → | N1W7:JBLS20_PREADD9_CORE_PREADD9_L3 |
| N1:JBLSO1_PREADD9_CORE_PREADD9_H0 | → | N1W7:JBLS21_PREADD9_CORE_PREADD9_H3 |
| N1:JBLSO1_PREADD9_CORE_PREADD9_L0 | → | N1W7:JBLS21_PREADD9_CORE_PREADD9_L3 |
| N1:JBLSO2_PREADD9_CORE_PREADD9_H0 | → | N1W7:JBLS22_PREADD9_CORE_PREADD9_H3 |
| N1:JBLSO2_PREADD9_CORE_PREADD9_L0 | → | N1W7:JBLS22_PREADD9_CORE_PREADD9_L3 |
| N1:JBLSO3_PREADD9_CORE_PREADD9_H0 | → | N1W7:JBLS23_PREADD9_CORE_PREADD9_H3 |
| N1:JBLSO3_PREADD9_CORE_PREADD9_L0 | → | N1W7:JBLS23_PREADD9_CORE_PREADD9_L3 |
| N1:JBLSO4_PREADD9_CORE_PREADD9_H0 | → | N1W7:JBLS24_PREADD9_CORE_PREADD9_H3 |
| N1:JBLSO4_PREADD9_CORE_PREADD9_L0 | → | N1W7:JBLS24_PREADD9_CORE_PREADD9_L3 |
| N1:JBLSO5_PREADD9_CORE_PREADD9_H0 | → | N1W7:JBLS25_PREADD9_CORE_PREADD9_H3 |
| N1:JBLSO5_PREADD9_CORE_PREADD9_L0 | → | N1W7:JBLS25_PREADD9_CORE_PREADD9_L3 |
| N1:JBLSO6_PREADD9_CORE_PREADD9_H0 | → | N1W7:JBLS26_PREADD9_CORE_PREADD9_H3 |
| N1:JBLSO6_PREADD9_CORE_PREADD9_L0 | → | N1W7:JBLS26_PREADD9_CORE_PREADD9_L3 |
| N1:JBLSO7_PREADD9_CORE_PREADD9_H0 | → | N1W7:JBLS27_PREADD9_CORE_PREADD9_H3 |
| N1:JBLSO7_PREADD9_CORE_PREADD9_L0 | → | N1W7:JBLS27_PREADD9_CORE_PREADD9_L3 |
| N1:JBLSO8_PREADD9_CORE_PREADD9_H0 | → | N1W7:JBLS28_PREADD9_CORE_PREADD9_H3 |
| N1:JBLSO8_PREADD9_CORE_PREADD9_L0 | → | N1W7:JBLS28_PREADD9_CORE_PREADD9_L3 |
| N1:JBLSOSGND_PREADD9_CORE_PREADD9_L0 | → | N1W7:JBLSS1_PREADD9_CORE_PREADD9_H3 |
| N1:JBLSOSGND_PREADD9_CORE_PREADD9_H0 | → | N1W7:JBLSS2_PREADD9_CORE_PREADD9_H3 |
| N1:JBLSOSGND_PREADD9_CORE_PREADD9_L0 | → | N1W7:JBLSS2_PREADD9_CORE_PREADD9_L3 |