DSP_L_9 Tile Documentation

Config Bitmap

 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
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Configuration Enums

Configuration enum MULT18_3.MULT18X18

enable 18x18 multiply

Value F48B0
DISABLED -
ENABLED 1

Configuration enum MULT18_3.ROUNDHALFUP

Value F45B0
DISABLED -
ENABLED 1

Configuration enum MULT18_3.ROUNDRTZI

rounding mode

Value F46B0
ROUND_TO_INFINITE 1
ROUND_TO_ZERO -

Configuration enum MULT18_3.SFTEN

enable variable shifter controlled by SFTCTRL

Value F47B0
DISABLED -
ENABLED 1

Configuration enum MULT9_H3.ASIGNED_OPERAND_EN

A is signed in SIGNEDSTATIC_EN mode

Value F82B0
DISABLED -
ENABLED 1

Configuration enum MULT9_H3.BYPASS_MULT9

selects between actually doing 9x9 mult; or just passing through inputs

Value F83B0
BYPASS 1
USED -

Configuration enum MULT9_H3.CEAMUX

CEA gating and inversion control

Value F84B0 F85B0
1 1 1
CEA - -
INV - 1

Configuration enum MULT9_H3.CLKMUX

clock gating and inversion control

Value F86B0 F87B0
0 - -
CLK 1 -
INV 1 1

Configuration enum MULT9_H3.GSR

if ENABLED primitive is reset by user GSR

Value F88B0
DISABLED 0
ENABLED 1

Configuration enum MULT9_H3.MODE

MULT9_H3 primitive mode

Value F88B0 F92B0
MULT9_CORE - -
NONE 1 1

Configuration enum MULT9_H3.REGBYPSA1

register enable or bypass for A1

Value F89B0
BYPASS 1
REGISTER -

Configuration enum MULT9_H3.REGBYPSA2

register enable or bypass for A2

Value F90B0
BYPASS 1
REGISTER -

Configuration enum MULT9_H3.REGBYPSB

register enable or bypass for B

Value F91B0
BYPASS 1
REGISTER -

Configuration enum MULT9_H3.RSTAMUX

RSTA gating and inversion control

Value F92B0 F93B0
0 - -
INV 1 1
RSTA 1 -

Configuration enum MULT9_H3.SHIFTA

use shift register for A

Value F94B0
DISABLED -
ENABLED 1

Configuration enum MULT9_H3.SIGNEDSTATIC_EN

A signedness from SIGNEDSTATIC_EN (when ENABLED) or ASIGNED input

Value F95B0
DISABLED -
ENABLED 1

Configuration enum MULT9_H3.SR_18BITSHIFT_EN

use 18-bit shift register for A

Value F81B0
DISABLED -
ENABLED 1

Configuration enum PREADD9_H3.BSIGNED_OPERAND_EN

B signedness in SIGNEDSTATIC_EN mode

Value F56B0
DISABLED -
ENABLED 1

Configuration enum PREADD9_H3.BYPASS_PREADD9

selects between pre-adder in datapath; or just passing through inputs

Value F57B0
BYPASS 1
USED -

Configuration enum PREADD9_H3.CEBMUX

CEB gating and inversion control

Value F58B0 F59B0
1 1 1
CEB - -
INV - 1

Configuration enum PREADD9_H3.CECLMUX

CECL gating and inversion control

Value F60B0 F61B0
1 1 1
CECL - -
INV - 1

Configuration enum PREADD9_H3.CLKMUX

clock gating and inversion control

Value F62B0 F63B0
0 - -
CLK 1 -
INV 1 1

Configuration enum PREADD9_H3.CSIGNED

C signedness in SIGNEDSTATIC_EN mode

Value F64B0
DISABLED -
ENABLED 1

Configuration enum PREADD9_H3.GSR

if ENABLED primitive is reset by user GSR

Value F65B0
DISABLED 0
ENABLED 1

Configuration enum PREADD9_H3.MODE

PREADD9_H3 primitive mode

Value F65B0 F71B0 F73B0
NONE 1 1 1
PREADD9_CORE - - -

Configuration enum PREADD9_H3.OPC

selects 2nd pre-adder operand

Value F66B0
INPUT_B_AS_PREADDER_OPERAND -
INPUT_C_AS_PREADDER_OPERAND 1

Configuration enum PREADD9_H3.PREADDCAS_EN

enable pre-adder carry cascade

Value F67B0
DISABLED -
ENABLED 1

Configuration enum PREADD9_H3.REGBYPSBL

register enable or bypass for BL

Value F68B0
BYPASS 1
REGISTER -

Configuration enum PREADD9_H3.REGBYPSBR0

register enable or bypass for BR0

Value F69B0
BYPASS 1
REGISTER -

Configuration enum PREADD9_H3.REGBYPSBR1

register enable or bypass for BR1

Value F70B0
BYPASS 1
REGISTER -

Configuration enum PREADD9_H3.RSTBMUX

RSTB gating and inversion control

Value F71B0 F72B0
0 - -
INV 1 1
RSTB 1 -

Configuration enum PREADD9_H3.RSTCLMUX

RSTCL gating and inversion control

Value F73B0 F74B0
0 - -
INV 1 1
RSTCL 1 -

Configuration enum PREADD9_H3.SHIFTBL

use left shift register for B

Value F75B0
BYPASS 1
REGISTER -

Configuration enum PREADD9_H3.SHIFTBR

use right shift register for B

Value F76B0
BYPASS 1
REGISTER -

Configuration enum PREADD9_H3.SIGNEDSTATIC_EN

B and C signedness from parameters (ENABLED) or inputs

Value F77B0
DISABLED -
ENABLED 1

Configuration enum PREADD9_H3.SR_18BITSHIFT_EN

use 18-bit shift register for B

Value F55B0
DISABLED -
ENABLED 1

Configuration enum PREADD9_H3.SUBSTRACT_EN

preadder function

Value F78B0
ADDITION 1
SUBTRACTION -

Configuration enum REG18_H1_0.CEPMUX

CEP gating and inversion control

Value F27B0 F28B0
1 1 1
CEP - -
INV - 1

Configuration enum REG18_H1_0.CLKMUX

clock gating and inversion control

Value F29B0 F30B0
0 - -
CLK 1 -
INV 1 1

Configuration enum REG18_H1_0.GSR

if ENABLED primitive is reset by user GSR

Value F31B0
DISABLED 0
ENABLED 1

Configuration enum REG18_H1_0.MODE

REG18_H1_0 primitive mode

Value F31B0 F33B0
NONE 1 1
REG18_CORE - -

Configuration enum REG18_H1_0.REGBYPS

register enable or bypass

Value F32B0
BYPASS 1
REGISTER -

Configuration enum REG18_H1_0.RSTPMUX

RSTP gating and inversion control

Value F33B0 F34B0
0 - -
INV 1 1
RSTP 1 -