DSP_L_4 Tile Documentation

Config Bitmap

 
 
 
 
 
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Configuration Enums

Configuration enum ACC54_0.CECTRLMUX

CECTRL gating and inversion control

Value F70B0 F72B0 F74B0 F76B0
1 1 1 1 1
CECTRL - - - -
INV - - - 1

Configuration enum ACC54_0.RSTCINMUX

RSTCIN gating and inversion control

Value F82B0 F84B0
0 - -
INV 1 1
RSTCIN 1 1

Configuration enum ACC54_0.RSTCMUX

RSTC gating and inversion control

Value F78B0 F80B0
0 - -
INV 1 1
RSTC 1 1

Configuration enum ACC54_0.RSTCTRLMUX

RSTCTRL gating and inversion control

Value F87B0 F89B0
0 - -
INV 1 1
RSTCTRL 1 1

Configuration enum ACC54_1.CECTRLMUX

CECTRL gating and inversion control

Value F71B0 F73B0 F75B0 F77B0
1 1 1 1 1
CECTRL - - - -
INV - - - 1

Configuration enum ACC54_1.RSTCINMUX

RSTCIN gating and inversion control

Value F83B0 F85B0
0 - -
INV 1 1
RSTCIN 1 1

Configuration enum ACC54_1.RSTCMUX

RSTC gating and inversion control

Value F79B0 F81B0
0 - -
INV 1 1
RSTC 1 1

Configuration enum ACC54_1.RSTCTRLMUX

RSTCTRL gating and inversion control

Value F88B0 F90B0
0 - -
INV 1 1
RSTCTRL 1 1

Configuration enum MULT18_1.MULT18X18

enable 18x18 multiply

Value F8B0
DISABLED -
ENABLED 1

Configuration enum MULT18_1.ROUNDHALFUP

Value F5B0
DISABLED -
ENABLED 1

Configuration enum MULT18_1.ROUNDRTZI

rounding mode

Value F6B0
ROUND_TO_INFINITE 1
ROUND_TO_ZERO -

Configuration enum MULT18_1.SFTEN

enable variable shifter controlled by SFTCTRL

Value F7B0
DISABLED -
ENABLED 1

Configuration enum MULT9_H0.MODE

MULT9_H0 primitive mode

Value F92B0
MULT9_CORE -
NONE 1

Configuration enum MULT9_H0.RSTAMUX

RSTA gating and inversion control

Value F92B0
0 -
INV 1
RSTA 1

Configuration enum MULT9_H1.ASIGNED_OPERAND_EN

A is signed in SIGNEDSTATIC_EN mode

Value F45B0
DISABLED -
ENABLED 1

Configuration enum MULT9_H1.BYPASS_MULT9

selects between actually doing 9x9 mult; or just passing through inputs

Value F46B0
BYPASS 1
USED -

Configuration enum MULT9_H1.CEAMUX

CEA gating and inversion control

Value F47B0 F48B0
1 1 1
CEA - -
INV - 1

Configuration enum MULT9_H1.CLKMUX

clock gating and inversion control

Value F49B0 F50B0
0 - -
CLK 1 -
INV 1 1

Configuration enum MULT9_H1.GSR

if ENABLED primitive is reset by user GSR

Value F51B0
DISABLED 0
ENABLED 1

Configuration enum MULT9_H1.MODE

MULT9_H1 primitive mode

Value F51B0 F55B0 F94B0
MULT9_CORE - - -
NONE 1 1 1

Configuration enum MULT9_H1.REGBYPSA1

register enable or bypass for A1

Value F52B0
BYPASS 1
REGISTER -

Configuration enum MULT9_H1.REGBYPSA2

register enable or bypass for A2

Value F53B0
BYPASS 1
REGISTER -

Configuration enum MULT9_H1.REGBYPSB

register enable or bypass for B

Value F54B0
BYPASS 1
REGISTER -

Configuration enum MULT9_H1.RSTAMUX

RSTA gating and inversion control

Value F55B0 F56B0 F94B0
0 - - -
INV 1 1 1
RSTA 1 - 1

Configuration enum MULT9_H1.SHIFTA

use shift register for A

Value F57B0
DISABLED -
ENABLED 1

Configuration enum MULT9_H1.SIGNEDSTATIC_EN

A signedness from SIGNEDSTATIC_EN (when ENABLED) or ASIGNED input

Value F58B0
DISABLED -
ENABLED 1

Configuration enum MULT9_H1.SR_18BITSHIFT_EN

use 18-bit shift register for A

Value F44B0
DISABLED -
ENABLED 1

Configuration enum MULT9_H2.MODE

MULT9_H2 primitive mode

Value F99B0
MULT9_CORE -
NONE 1

Configuration enum MULT9_H2.RSTAMUX

RSTA gating and inversion control

Value F99B0
0 -
INV 1
RSTA 1

Configuration enum MULT9_H3.MODE

MULT9_H3 primitive mode

Value F101B0
MULT9_CORE -
NONE 1

Configuration enum MULT9_H3.RSTAMUX

RSTA gating and inversion control

Value F101B0
0 -
INV 1
RSTA 1

Configuration enum MULT9_L0.MODE

MULT9_L0 primitive mode

Value F91B0
MULT9_CORE -
NONE 1

Configuration enum MULT9_L0.RSTAMUX

RSTA gating and inversion control

Value F91B0
0 -
INV 1
RSTA 1

Configuration enum MULT9_L1.MODE

MULT9_L1 primitive mode

Value F93B0
MULT9_CORE -
NONE 1

Configuration enum MULT9_L1.RSTAMUX

RSTA gating and inversion control

Value F93B0
0 -
INV 1
RSTA 1

Configuration enum MULT9_L2.MODE

MULT9_L2 primitive mode

Value F98B0
MULT9_CORE -
NONE 1

Configuration enum MULT9_L2.RSTAMUX

RSTA gating and inversion control

Value F98B0
0 -
INV 1
RSTA 1

Configuration enum MULT9_L3.MODE

MULT9_L3 primitive mode

Value F100B0
MULT9_CORE -
NONE 1

Configuration enum MULT9_L3.RSTAMUX

RSTA gating and inversion control

Value F100B0
0 -
INV 1
RSTA 1

Configuration enum PREADD9_H1.BSIGNED_OPERAND_EN

B signedness in SIGNEDSTATIC_EN mode

Value F17B0
DISABLED -
ENABLED 1

Configuration enum PREADD9_H1.BYPASS_PREADD9

selects between pre-adder in datapath; or just passing through inputs

Value F18B0
BYPASS 1
USED -

Configuration enum PREADD9_H1.CEBMUX

CEB gating and inversion control

Value F19B0 F20B0
1 1 1
CEB - -
INV - 1

Configuration enum PREADD9_H1.CECLMUX

CECL gating and inversion control

Value F21B0 F22B0
1 1 1
CECL - -
INV - 1

Configuration enum PREADD9_H1.CLKMUX

clock gating and inversion control

Value F23B0 F24B0
0 - -
CLK 1 -
INV 1 1

Configuration enum PREADD9_H1.CSIGNED

C signedness in SIGNEDSTATIC_EN mode

Value F25B0
DISABLED -
ENABLED 1

Configuration enum PREADD9_H1.GSR

if ENABLED primitive is reset by user GSR

Value F26B0
DISABLED 0
ENABLED 1

Configuration enum PREADD9_H1.MODE

PREADD9_H1 primitive mode

Value F26B0 F32B0 F34B0
NONE 1 1 1
PREADD9_CORE - - -

Configuration enum PREADD9_H1.OPC

selects 2nd pre-adder operand

Value F27B0
INPUT_B_AS_PREADDER_OPERAND -
INPUT_C_AS_PREADDER_OPERAND 1

Configuration enum PREADD9_H1.PREADDCAS_EN

enable pre-adder carry cascade

Value F28B0
DISABLED -
ENABLED 1

Configuration enum PREADD9_H1.REGBYPSBL

register enable or bypass for BL

Value F29B0
BYPASS 1
REGISTER -

Configuration enum PREADD9_H1.REGBYPSBR0

register enable or bypass for BR0

Value F30B0
BYPASS 1
REGISTER -

Configuration enum PREADD9_H1.REGBYPSBR1

register enable or bypass for BR1

Value F31B0
BYPASS 1
REGISTER -

Configuration enum PREADD9_H1.RSTBMUX

RSTB gating and inversion control

Value F32B0 F33B0
0 - -
INV 1 1
RSTB 1 -

Configuration enum PREADD9_H1.RSTCLMUX

RSTCL gating and inversion control

Value F34B0 F35B0
0 - -
INV 1 1
RSTCL 1 -

Configuration enum PREADD9_H1.SHIFTBL

use left shift register for B

Value F36B0
BYPASS 1
REGISTER -

Configuration enum PREADD9_H1.SHIFTBR

use right shift register for B

Value F37B0
BYPASS 1
REGISTER -

Configuration enum PREADD9_H1.SIGNEDSTATIC_EN

B and C signedness from parameters (ENABLED) or inputs

Value F38B0
DISABLED -
ENABLED 1

Configuration enum PREADD9_H1.SR_18BITSHIFT_EN

use 18-bit shift register for B

Value F16B0
DISABLED -
ENABLED 1

Configuration enum PREADD9_H1.SUBSTRACT_EN

preadder function

Value F39B0
ADDITION 1
SUBTRACTION -

Configuration enum REG18_L1_1.CEPMUX

CEP gating and inversion control

Value F61B0 F62B0
1 1 1
CEP - -
INV - 1

Configuration enum REG18_L1_1.CLKMUX

clock gating and inversion control

Value F63B0 F64B0
0 - -
CLK 1 -
INV 1 1

Configuration enum REG18_L1_1.GSR

if ENABLED primitive is reset by user GSR

Value F65B0
DISABLED 0
ENABLED 1

Configuration enum REG18_L1_1.MODE

REG18_L1_1 primitive mode

Value F65B0 F67B0
NONE 1 1
REG18_CORE - -

Configuration enum REG18_L1_1.REGBYPS

register enable or bypass

Value F66B0
BYPASS 1
REGISTER -

Configuration enum REG18_L1_1.RSTPMUX

RSTP gating and inversion control

Value F67B0 F68B0
0 - -
INV 1 1
RSTP 1 -