PLC/SLICEC_FF0 (OXIDE_FF) Bel Documentation

OXIDE_FF bels are half the sequential part of a SLICE. They implement a single flip flop.

Bel Pins

PinWire
CLK← JCLK_SLICECFF clock
CE← JCE_SLICECFF clock enable
LSR← JLSR_SLICECFF local set/reset
DI← JDI0_SLICECFF input from LUT/MUX output
M← JM0_SLICECFF direct input from fabric M signal
Q→ JQ0_SLICECFF output