PLC/SLICEA_FF0 (OXIDE_FF) Bel Documentation

OXIDE_FF bels are half the sequential part of a SLICE. They implement a single flip flop.

Bel Pins

PinWire
CLK← JCLK_SLICEAFF clock
CE← JCE_SLICEAFF clock enable
LSR← JLSR_SLICEAFF local set/reset
DI← JDI0_SLICEAFF input from LUT/MUX output
M← JM0_SLICEAFF direct input from fabric M signal
Q→ JQ0_SLICEAFF output