DSP_L_3/ACC54_0 (ACC54_CORE) Bel Documentation

Bel Pins

PinWire
CASCOUT0→ N1:JCASCOUT0_ACC54_CORE_ACC54_0
CASCOUT1→ N1:JCASCOUT1_ACC54_CORE_ACC54_0
DSPOUT0→ N1:JDSPOUT0_ACC54_CORE_ACC54_0
DSPOUT10→ N1:JDSPOUT10_ACC54_CORE_ACC54_0
DSPOUT11→ N1:JDSPOUT11_ACC54_CORE_ACC54_0
DSPOUT12→ N1:JDSPOUT12_ACC54_CORE_ACC54_0
DSPOUT13→ N1:JDSPOUT13_ACC54_CORE_ACC54_0
DSPOUT14→ N1:JDSPOUT14_ACC54_CORE_ACC54_0
DSPOUT15→ N1:JDSPOUT15_ACC54_CORE_ACC54_0
DSPOUT16→ N1:JDSPOUT16_ACC54_CORE_ACC54_0
DSPOUT17→ N1:JDSPOUT17_ACC54_CORE_ACC54_0
DSPOUT18→ N1:JDSPOUT18_ACC54_CORE_ACC54_0
DSPOUT19→ N1:JDSPOUT19_ACC54_CORE_ACC54_0
DSPOUT1→ N1:JDSPOUT1_ACC54_CORE_ACC54_0
DSPOUT20→ N1:JDSPOUT20_ACC54_CORE_ACC54_0
DSPOUT21→ N1:JDSPOUT21_ACC54_CORE_ACC54_0
DSPOUT22→ N1:JDSPOUT22_ACC54_CORE_ACC54_0
DSPOUT23→ N1:JDSPOUT23_ACC54_CORE_ACC54_0
DSPOUT24→ N1:JDSPOUT24_ACC54_CORE_ACC54_0
DSPOUT25→ N1:JDSPOUT25_ACC54_CORE_ACC54_0
DSPOUT26→ N1:JDSPOUT26_ACC54_CORE_ACC54_0
DSPOUT27→ N1:JDSPOUT27_ACC54_CORE_ACC54_0
DSPOUT28→ N1:JDSPOUT28_ACC54_CORE_ACC54_0
DSPOUT29→ N1:JDSPOUT29_ACC54_CORE_ACC54_0
DSPOUT2→ N1:JDSPOUT2_ACC54_CORE_ACC54_0
DSPOUT30→ N1:JDSPOUT30_ACC54_CORE_ACC54_0
DSPOUT31→ N1:JDSPOUT31_ACC54_CORE_ACC54_0
DSPOUT32→ N1:JDSPOUT32_ACC54_CORE_ACC54_0
DSPOUT33→ N1:JDSPOUT33_ACC54_CORE_ACC54_0
DSPOUT34→ N1:JDSPOUT34_ACC54_CORE_ACC54_0
DSPOUT35→ N1:JDSPOUT35_ACC54_CORE_ACC54_0
DSPOUT36→ N1:JDSPOUT36_ACC54_CORE_ACC54_0
DSPOUT37→ N1:JDSPOUT37_ACC54_CORE_ACC54_0
DSPOUT38→ N1:JDSPOUT38_ACC54_CORE_ACC54_0
DSPOUT39→ N1:JDSPOUT39_ACC54_CORE_ACC54_0
DSPOUT3→ N1:JDSPOUT3_ACC54_CORE_ACC54_0
DSPOUT40→ N1:JDSPOUT40_ACC54_CORE_ACC54_0
DSPOUT41→ N1:JDSPOUT41_ACC54_CORE_ACC54_0
DSPOUT42→ N1:JDSPOUT42_ACC54_CORE_ACC54_0
DSPOUT43→ N1:JDSPOUT43_ACC54_CORE_ACC54_0
DSPOUT44→ N1:JDSPOUT44_ACC54_CORE_ACC54_0
DSPOUT45→ N1:JDSPOUT45_ACC54_CORE_ACC54_0
DSPOUT46→ N1:JDSPOUT46_ACC54_CORE_ACC54_0
DSPOUT47→ N1:JDSPOUT47_ACC54_CORE_ACC54_0
DSPOUT48→ N1:JDSPOUT48_ACC54_CORE_ACC54_0
DSPOUT49→ N1:JDSPOUT49_ACC54_CORE_ACC54_0
DSPOUT4→ N1:JDSPOUT4_ACC54_CORE_ACC54_0
DSPOUT50→ N1:JDSPOUT50_ACC54_CORE_ACC54_0
DSPOUT51→ N1:JDSPOUT51_ACC54_CORE_ACC54_0
DSPOUT52→ N1:JDSPOUT52_ACC54_CORE_ACC54_0
DSPOUT53→ N1:JDSPOUT53_ACC54_CORE_ACC54_0
DSPOUT5→ N1:JDSPOUT5_ACC54_CORE_ACC54_0
DSPOUT6→ N1:JDSPOUT6_ACC54_CORE_ACC54_0
DSPOUT7→ N1:JDSPOUT7_ACC54_CORE_ACC54_0
DSPOUT8→ N1:JDSPOUT8_ACC54_CORE_ACC54_0
DSPOUT9→ N1:JDSPOUT9_ACC54_CORE_ACC54_0
SUM00→ N1:JSUM00_ACC54_CORE_ACC54_0
SUM010→ N1:JSUM010_ACC54_CORE_ACC54_0
SUM011→ N1:JSUM011_ACC54_CORE_ACC54_0
SUM012→ N1:JSUM012_ACC54_CORE_ACC54_0
SUM013→ N1:JSUM013_ACC54_CORE_ACC54_0
SUM014→ N1:JSUM014_ACC54_CORE_ACC54_0
SUM015→ N1:JSUM015_ACC54_CORE_ACC54_0
SUM016→ N1:JSUM016_ACC54_CORE_ACC54_0
SUM017→ N1:JSUM017_ACC54_CORE_ACC54_0
SUM018→ N1:JSUM018_ACC54_CORE_ACC54_0
SUM019→ N1:JSUM019_ACC54_CORE_ACC54_0
SUM01→ N1:JSUM01_ACC54_CORE_ACC54_0
SUM020→ N1:JSUM020_ACC54_CORE_ACC54_0
SUM021→ N1:JSUM021_ACC54_CORE_ACC54_0
SUM022→ N1:JSUM022_ACC54_CORE_ACC54_0
SUM023→ N1:JSUM023_ACC54_CORE_ACC54_0
SUM024→ N1:JSUM024_ACC54_CORE_ACC54_0
SUM025→ N1:JSUM025_ACC54_CORE_ACC54_0
SUM026→ N1:JSUM026_ACC54_CORE_ACC54_0
SUM027→ N1:JSUM027_ACC54_CORE_ACC54_0
SUM028→ N1:JSUM028_ACC54_CORE_ACC54_0
SUM029→ N1:JSUM029_ACC54_CORE_ACC54_0
SUM02→ N1:JSUM02_ACC54_CORE_ACC54_0
SUM030→ N1:JSUM030_ACC54_CORE_ACC54_0
SUM031→ N1:JSUM031_ACC54_CORE_ACC54_0
SUM032→ N1:JSUM032_ACC54_CORE_ACC54_0
SUM033→ N1:JSUM033_ACC54_CORE_ACC54_0
SUM034→ N1:JSUM034_ACC54_CORE_ACC54_0
SUM035→ N1:JSUM035_ACC54_CORE_ACC54_0
SUM03→ N1:JSUM03_ACC54_CORE_ACC54_0
SUM04→ N1:JSUM04_ACC54_CORE_ACC54_0
SUM05→ N1:JSUM05_ACC54_CORE_ACC54_0
SUM06→ N1:JSUM06_ACC54_CORE_ACC54_0
SUM07→ N1:JSUM07_ACC54_CORE_ACC54_0
SUM08→ N1:JSUM08_ACC54_CORE_ACC54_0
SUM09→ N1:JSUM09_ACC54_CORE_ACC54_0
SUM10→ N1:JSUM10_ACC54_CORE_ACC54_0
SUM110→ N1:JSUM110_ACC54_CORE_ACC54_0
SUM111→ N1:JSUM111_ACC54_CORE_ACC54_0
SUM112→ N1:JSUM112_ACC54_CORE_ACC54_0
SUM113→ N1:JSUM113_ACC54_CORE_ACC54_0
SUM114→ N1:JSUM114_ACC54_CORE_ACC54_0
SUM115→ N1:JSUM115_ACC54_CORE_ACC54_0
SUM116→ N1:JSUM116_ACC54_CORE_ACC54_0
SUM117→ N1:JSUM117_ACC54_CORE_ACC54_0
SUM118→ N1:JSUM118_ACC54_CORE_ACC54_0
SUM119→ N1:JSUM119_ACC54_CORE_ACC54_0
SUM11→ N1:JSUM11_ACC54_CORE_ACC54_0
SUM120→ N1:JSUM120_ACC54_CORE_ACC54_0
SUM121→ N1:JSUM121_ACC54_CORE_ACC54_0
SUM122→ N1:JSUM122_ACC54_CORE_ACC54_0
SUM123→ N1:JSUM123_ACC54_CORE_ACC54_0
SUM124→ N1:JSUM124_ACC54_CORE_ACC54_0
SUM125→ N1:JSUM125_ACC54_CORE_ACC54_0
SUM126→ N1:JSUM126_ACC54_CORE_ACC54_0
SUM127→ N1:JSUM127_ACC54_CORE_ACC54_0
SUM128→ N1:JSUM128_ACC54_CORE_ACC54_0
SUM129→ N1:JSUM129_ACC54_CORE_ACC54_0
SUM12→ N1:JSUM12_ACC54_CORE_ACC54_0
SUM130→ N1:JSUM130_ACC54_CORE_ACC54_0
SUM131→ N1:JSUM131_ACC54_CORE_ACC54_0
SUM132→ N1:JSUM132_ACC54_CORE_ACC54_0
SUM133→ N1:JSUM133_ACC54_CORE_ACC54_0
SUM134→ N1:JSUM134_ACC54_CORE_ACC54_0
SUM135→ N1:JSUM135_ACC54_CORE_ACC54_0
SUM13→ N1:JSUM13_ACC54_CORE_ACC54_0
SUM14→ N1:JSUM14_ACC54_CORE_ACC54_0
SUM15→ N1:JSUM15_ACC54_CORE_ACC54_0
SUM16→ N1:JSUM16_ACC54_CORE_ACC54_0
SUM17→ N1:JSUM17_ACC54_CORE_ACC54_0
SUM18→ N1:JSUM18_ACC54_CORE_ACC54_0
SUM19→ N1:JSUM19_ACC54_CORE_ACC54_0
ADDSUB0← N1:JADDSUB0_ACC54_CORE_ACC54_0
ADDSUB1← N1:JADDSUB1_ACC54_CORE_ACC54_0
CASIN0← N1:JCASIN0_ACC54_CORE_ACC54_0
CASIN1← N1:JCASIN1_ACC54_CORE_ACC54_0
CECIN← N1:JCECIN_ACC54_CORE_ACC54_0
CECTRL← N1:JCECTRL_ACC54_CORE_ACC54_0
CEC← N1:JCEC_ACC54_CORE_ACC54_0
CEO← N1:JCEO_ACC54_CORE_ACC54_0
CINPUT0← N1:JCINPUT0_ACC54_CORE_ACC54_0
CINPUT10← N1:JCINPUT10_ACC54_CORE_ACC54_0
CINPUT11← N1:JCINPUT11_ACC54_CORE_ACC54_0
CINPUT12← N1:JCINPUT12_ACC54_CORE_ACC54_0
CINPUT13← N1:JCINPUT13_ACC54_CORE_ACC54_0
CINPUT14← N1:JCINPUT14_ACC54_CORE_ACC54_0
CINPUT15← N1:JCINPUT15_ACC54_CORE_ACC54_0
CINPUT16← N1:JCINPUT16_ACC54_CORE_ACC54_0
CINPUT17← N1:JCINPUT17_ACC54_CORE_ACC54_0
CINPUT18← N1:JCINPUT18_ACC54_CORE_ACC54_0
CINPUT19← N1:JCINPUT19_ACC54_CORE_ACC54_0
CINPUT1← N1:JCINPUT1_ACC54_CORE_ACC54_0
CINPUT20← N1:JCINPUT20_ACC54_CORE_ACC54_0
CINPUT21← N1:JCINPUT21_ACC54_CORE_ACC54_0
CINPUT22← N1:JCINPUT22_ACC54_CORE_ACC54_0
CINPUT23← N1:JCINPUT23_ACC54_CORE_ACC54_0
CINPUT24← N1:JCINPUT24_ACC54_CORE_ACC54_0
CINPUT25← N1:JCINPUT25_ACC54_CORE_ACC54_0
CINPUT26← N1:JCINPUT26_ACC54_CORE_ACC54_0
CINPUT27← N1:JCINPUT27_ACC54_CORE_ACC54_0
CINPUT28← N1:JCINPUT28_ACC54_CORE_ACC54_0
CINPUT29← N1:JCINPUT29_ACC54_CORE_ACC54_0
CINPUT2← N1:JCINPUT2_ACC54_CORE_ACC54_0
CINPUT30← N1:JCINPUT30_ACC54_CORE_ACC54_0
CINPUT31← N1:JCINPUT31_ACC54_CORE_ACC54_0
CINPUT32← N1:JCINPUT32_ACC54_CORE_ACC54_0
CINPUT33← N1:JCINPUT33_ACC54_CORE_ACC54_0
CINPUT34← N1:JCINPUT34_ACC54_CORE_ACC54_0
CINPUT35← N1:JCINPUT35_ACC54_CORE_ACC54_0
CINPUT36← N1:JCINPUT36_ACC54_CORE_ACC54_0
CINPUT37← N1:JCINPUT37_ACC54_CORE_ACC54_0
CINPUT38← N1:JCINPUT38_ACC54_CORE_ACC54_0
CINPUT39← N1:JCINPUT39_ACC54_CORE_ACC54_0
CINPUT3← N1:JCINPUT3_ACC54_CORE_ACC54_0
CINPUT40← N1:JCINPUT40_ACC54_CORE_ACC54_0
CINPUT41← N1:JCINPUT41_ACC54_CORE_ACC54_0
CINPUT42← N1:JCINPUT42_ACC54_CORE_ACC54_0
CINPUT43← N1:JCINPUT43_ACC54_CORE_ACC54_0
CINPUT44← N1:JCINPUT44_ACC54_CORE_ACC54_0
CINPUT45← N1:JCINPUT45_ACC54_CORE_ACC54_0
CINPUT46← N1:JCINPUT46_ACC54_CORE_ACC54_0
CINPUT47← N1:JCINPUT47_ACC54_CORE_ACC54_0
CINPUT48← N1:JCINPUT48_ACC54_CORE_ACC54_0
CINPUT49← N1:JCINPUT49_ACC54_CORE_ACC54_0
CINPUT4← N1:JCINPUT4_ACC54_CORE_ACC54_0
CINPUT50← N1:JCINPUT50_ACC54_CORE_ACC54_0
CINPUT51← N1:JCINPUT51_ACC54_CORE_ACC54_0
CINPUT52← N1:JCINPUT52_ACC54_CORE_ACC54_0
CINPUT53← N1:JCINPUT53_ACC54_CORE_ACC54_0
CINPUT5← N1:JCINPUT5_ACC54_CORE_ACC54_0
CINPUT6← N1:JCINPUT6_ACC54_CORE_ACC54_0
CINPUT7← N1:JCINPUT7_ACC54_CORE_ACC54_0
CINPUT8← N1:JCINPUT8_ACC54_CORE_ACC54_0
CINPUT9← N1:JCINPUT9_ACC54_CORE_ACC54_0
CIN← N1:JCIN_ACC54_CORE_ACC54_0
CLK← N1:JCLK_ACC54_CORE_ACC54_0
DSPIN0← N1:JDSPIN0_ACC54_CORE_ACC54_0
DSPIN10← N1:JDSPIN10_ACC54_CORE_ACC54_0
DSPIN11← N1:JDSPIN11_ACC54_CORE_ACC54_0
DSPIN12← N1:JDSPIN12_ACC54_CORE_ACC54_0
DSPIN13← N1:JDSPIN13_ACC54_CORE_ACC54_0
DSPIN14← N1:JDSPIN14_ACC54_CORE_ACC54_0
DSPIN15← N1:JDSPIN15_ACC54_CORE_ACC54_0
DSPIN16← N1:JDSPIN16_ACC54_CORE_ACC54_0
DSPIN17← N1:JDSPIN17_ACC54_CORE_ACC54_0
DSPIN18← N1:JDSPIN18_ACC54_CORE_ACC54_0
DSPIN19← N1:JDSPIN19_ACC54_CORE_ACC54_0
DSPIN1← N1:JDSPIN1_ACC54_CORE_ACC54_0
DSPIN20← N1:JDSPIN20_ACC54_CORE_ACC54_0
DSPIN21← N1:JDSPIN21_ACC54_CORE_ACC54_0
DSPIN22← N1:JDSPIN22_ACC54_CORE_ACC54_0
DSPIN23← N1:JDSPIN23_ACC54_CORE_ACC54_0
DSPIN24← N1:JDSPIN24_ACC54_CORE_ACC54_0
DSPIN25← N1:JDSPIN25_ACC54_CORE_ACC54_0
DSPIN26← N1:JDSPIN26_ACC54_CORE_ACC54_0
DSPIN27← N1:JDSPIN27_ACC54_CORE_ACC54_0
DSPIN28← N1:JDSPIN28_ACC54_CORE_ACC54_0
DSPIN29← N1:JDSPIN29_ACC54_CORE_ACC54_0
DSPIN2← N1:JDSPIN2_ACC54_CORE_ACC54_0
DSPIN30← N1:JDSPIN30_ACC54_CORE_ACC54_0
DSPIN31← N1:JDSPIN31_ACC54_CORE_ACC54_0
DSPIN32← N1:JDSPIN32_ACC54_CORE_ACC54_0
DSPIN33← N1:JDSPIN33_ACC54_CORE_ACC54_0
DSPIN34← N1:JDSPIN34_ACC54_CORE_ACC54_0
DSPIN35← N1:JDSPIN35_ACC54_CORE_ACC54_0
DSPIN36← N1:JDSPIN36_ACC54_CORE_ACC54_0
DSPIN37← N1:JDSPIN37_ACC54_CORE_ACC54_0
DSPIN38← N1:JDSPIN38_ACC54_CORE_ACC54_0
DSPIN39← N1:JDSPIN39_ACC54_CORE_ACC54_0
DSPIN3← N1:JDSPIN3_ACC54_CORE_ACC54_0
DSPIN40← N1:JDSPIN40_ACC54_CORE_ACC54_0
DSPIN41← N1:JDSPIN41_ACC54_CORE_ACC54_0
DSPIN42← N1:JDSPIN42_ACC54_CORE_ACC54_0
DSPIN43← N1:JDSPIN43_ACC54_CORE_ACC54_0
DSPIN44← N1:JDSPIN44_ACC54_CORE_ACC54_0
DSPIN45← N1:JDSPIN45_ACC54_CORE_ACC54_0
DSPIN46← N1:JDSPIN46_ACC54_CORE_ACC54_0
DSPIN47← N1:JDSPIN47_ACC54_CORE_ACC54_0
DSPIN48← N1:JDSPIN48_ACC54_CORE_ACC54_0
DSPIN49← N1:JDSPIN49_ACC54_CORE_ACC54_0
DSPIN4← N1:JDSPIN4_ACC54_CORE_ACC54_0
DSPIN50← N1:JDSPIN50_ACC54_CORE_ACC54_0
DSPIN51← N1:JDSPIN51_ACC54_CORE_ACC54_0
DSPIN52← N1:JDSPIN52_ACC54_CORE_ACC54_0
DSPIN53← N1:JDSPIN53_ACC54_CORE_ACC54_0
DSPIN5← N1:JDSPIN5_ACC54_CORE_ACC54_0
DSPIN6← N1:JDSPIN6_ACC54_CORE_ACC54_0
DSPIN7← N1:JDSPIN7_ACC54_CORE_ACC54_0
DSPIN8← N1:JDSPIN8_ACC54_CORE_ACC54_0
DSPIN9← N1:JDSPIN9_ACC54_CORE_ACC54_0
LOAD← N1:JLOAD_ACC54_CORE_ACC54_0
M9ADDSUB0← N1:JM9ADDSUB0_ACC54_CORE_ACC54_0
M9ADDSUB1← N1:JM9ADDSUB1_ACC54_CORE_ACC54_0
PP0← N1:JPP0_ACC54_CORE_ACC54_0
PP10← N1:JPP10_ACC54_CORE_ACC54_0
PP11← N1:JPP11_ACC54_CORE_ACC54_0
PP12← N1:JPP12_ACC54_CORE_ACC54_0
PP13← N1:JPP13_ACC54_CORE_ACC54_0
PP14← N1:JPP14_ACC54_CORE_ACC54_0
PP15← N1:JPP15_ACC54_CORE_ACC54_0
PP16← N1:JPP16_ACC54_CORE_ACC54_0
PP17← N1:JPP17_ACC54_CORE_ACC54_0
PP18← N1:JPP18_ACC54_CORE_ACC54_0
PP19← N1:JPP19_ACC54_CORE_ACC54_0
PP1← N1:JPP1_ACC54_CORE_ACC54_0
PP20← N1:JPP20_ACC54_CORE_ACC54_0
PP21← N1:JPP21_ACC54_CORE_ACC54_0
PP22← N1:JPP22_ACC54_CORE_ACC54_0
PP23← N1:JPP23_ACC54_CORE_ACC54_0
PP24← N1:JPP24_ACC54_CORE_ACC54_0
PP25← N1:JPP25_ACC54_CORE_ACC54_0
PP26← N1:JPP26_ACC54_CORE_ACC54_0
PP27← N1:JPP27_ACC54_CORE_ACC54_0
PP28← N1:JPP28_ACC54_CORE_ACC54_0
PP29← N1:JPP29_ACC54_CORE_ACC54_0
PP2← N1:JPP2_ACC54_CORE_ACC54_0
PP30← N1:JPP30_ACC54_CORE_ACC54_0
PP31← N1:JPP31_ACC54_CORE_ACC54_0
PP32← N1:JPP32_ACC54_CORE_ACC54_0
PP33← N1:JPP33_ACC54_CORE_ACC54_0
PP34← N1:JPP34_ACC54_CORE_ACC54_0
PP35← N1:JPP35_ACC54_CORE_ACC54_0
PP36← N1:JPP36_ACC54_CORE_ACC54_0
PP37← N1:JPP37_ACC54_CORE_ACC54_0
PP38← N1:JPP38_ACC54_CORE_ACC54_0
PP39← N1:JPP39_ACC54_CORE_ACC54_0
PP3← N1:JPP3_ACC54_CORE_ACC54_0
PP40← N1:JPP40_ACC54_CORE_ACC54_0
PP41← N1:JPP41_ACC54_CORE_ACC54_0
PP42← N1:JPP42_ACC54_CORE_ACC54_0
PP43← N1:JPP43_ACC54_CORE_ACC54_0
PP44← N1:JPP44_ACC54_CORE_ACC54_0
PP45← N1:JPP45_ACC54_CORE_ACC54_0
PP46← N1:JPP46_ACC54_CORE_ACC54_0
PP47← N1:JPP47_ACC54_CORE_ACC54_0
PP48← N1:JPP48_ACC54_CORE_ACC54_0
PP49← N1:JPP49_ACC54_CORE_ACC54_0
PP4← N1:JPP4_ACC54_CORE_ACC54_0
PP50← N1:JPP50_ACC54_CORE_ACC54_0
PP51← N1:JPP51_ACC54_CORE_ACC54_0
PP52← N1:JPP52_ACC54_CORE_ACC54_0
PP53← N1:JPP53_ACC54_CORE_ACC54_0
PP54← N1:JPP54_ACC54_CORE_ACC54_0
PP55← N1:JPP55_ACC54_CORE_ACC54_0
PP56← N1:JPP56_ACC54_CORE_ACC54_0
PP57← N1:JPP57_ACC54_CORE_ACC54_0
PP58← N1:JPP58_ACC54_CORE_ACC54_0
PP59← N1:JPP59_ACC54_CORE_ACC54_0
PP5← N1:JPP5_ACC54_CORE_ACC54_0
PP60← N1:JPP60_ACC54_CORE_ACC54_0
PP61← N1:JPP61_ACC54_CORE_ACC54_0
PP62← N1:JPP62_ACC54_CORE_ACC54_0
PP63← N1:JPP63_ACC54_CORE_ACC54_0
PP64← N1:JPP64_ACC54_CORE_ACC54_0
PP65← N1:JPP65_ACC54_CORE_ACC54_0
PP66← N1:JPP66_ACC54_CORE_ACC54_0
PP67← N1:JPP67_ACC54_CORE_ACC54_0
PP68← N1:JPP68_ACC54_CORE_ACC54_0
PP69← N1:JPP69_ACC54_CORE_ACC54_0
PP6← N1:JPP6_ACC54_CORE_ACC54_0
PP70← N1:JPP70_ACC54_CORE_ACC54_0
PP71← N1:JPP71_ACC54_CORE_ACC54_0
PP7← N1:JPP7_ACC54_CORE_ACC54_0
PP8← N1:JPP8_ACC54_CORE_ACC54_0
PP9← N1:JPP9_ACC54_CORE_ACC54_0
ROUNDEN← N1:JROUNDEN_ACC54_CORE_ACC54_0
RSTCIN← N1:JRSTCIN_ACC54_CORE_ACC54_0
RSTCTRL← N1:JRSTCTRL_ACC54_CORE_ACC54_0
RSTC← N1:JRSTC_ACC54_CORE_ACC54_0
RSTO← N1:JRSTO_ACC54_CORE_ACC54_0
SFTCTRL0← N1:JSFTCTRL0_ACC54_CORE_ACC54_0
SFTCTRL1← N1:JSFTCTRL1_ACC54_CORE_ACC54_0
SFTCTRL2← N1:JSFTCTRL2_ACC54_CORE_ACC54_0
SFTCTRL3← N1:JSFTCTRL3_ACC54_CORE_ACC54_0
SIGNEDI← N1:JSIGNEDI_ACC54_CORE_ACC54_0