PLC/SLICED_FF0 (OXIDE_FF) Bel Documentation

OXIDE_FF bels are half the sequential part of a SLICE. They implement a single flip flop.

Bel Pins

PinWire
CLK← JCLK_SLICEDFF clock
CE← JCE_SLICEDFF clock enable
LSR← JLSR_SLICEDFF local set/reset
DI← JDI0_SLICEDFF input from LUT/MUX output
M← JM0_SLICEDFF direct input from fabric M signal
Q→ JQ0_SLICEDFF output