| Pin | | Wire | |
|---|
| A0 | ← |
JA0_SLICEC | buffered to WADO3 |
| A1 | ← |
JA1_SLICEC | buffered to WDO2 |
| B0 | ← |
JB0_SLICEC | buffered to WADO1 |
| B1 | ← |
JB1_SLICEC | buffered to WDO3 |
| C0 | ← |
JC0_SLICEC | buffered to WADO2 |
| C1 | ← |
JC1_SLICEC | buffered to WDO1 |
| D0 | ← |
JD0_SLICEC | buffered to WADO0 |
| D1 | ← |
JD1_SLICEC | buffered to WDO0 |
| CLK | ← |
JCLK_SLICEC | buffered to WCKO |
| LSR | ← |
JLSR_SLICEC | buffered to WREO |
| WADO0 | → |
JWADO0_SLICEC | LUTRAM write address 0 (to SLICEA/B) |
| WADO1 | → |
JWADO1_SLICEC | LUTRAM write address 1 (to SLICEA/B) |
| WADO2 | → |
JWADO2_SLICEC | LUTRAM write address 2 (to SLICEA/B) |
| WADO3 | → |
JWADO3_SLICEC | LUTRAM write address 3 (to SLICEA/B) |
| WCKO | → |
JWCKO_SLICEC | LUTRAM write clock (to SLICEA/B) |
| WREO | → |
JWREO_SLICEC | LUTRAM write enable (to SLICEA/B) |
| WDO0 | → |
JWDO0_SLICEC | LUTRAM write data 0 (to SLICEA) |
| WDO1 | → |
JWDO1_SLICEC | LUTRAM write data 1 (to SLICEA) |
| WDO2 | → |
JWDO2_SLICEC | LUTRAM write data 2 (to SLICEB) |
| WDO3 | → |
JWDO3_SLICEC | LUTRAM write data 3 (to SLICEB) |